Intel® FPGA University Program
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Ethernet connectivity on DE2

Altera_Forum
Honored Contributor II
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Hi, i tried to download the ethernet_core "NET2" from this forum about TCP/IP core for controlling the DM9000A. Unfortunately im having a hard time to understand it. Does the control of ethernet using DM9000A need to use both verilog HDL coded in quartus and also C code in nios II EDS ? 

 

The link for the file 

 

http://www.mediafire.com/?o9k58t93qbd5oai
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Altera_Forum
Honored Contributor II
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Hi im trying to understand the code, what is the host side in this context, i attached a picture with this...

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