I have Top Qsys with some generic components.
When I'm trying to change the "IP Regeneration Policy" on the IP settings to "Always regenerate design files for IP cores" the generic components are not regenerate.
Do you have a solution for this, except for the opening the QSYS and generate ?
The software will automatically regenerate the Qsys system during the compilation if you add .qsys file to the project directory. When the Intel Quartus Prime software starts the Analysis & Synthesis phase, it processes the .qsys files and generates the necessary HDL and system description files needed to compile your design.
I created Qsys Top level file with generic components.
I'm trying to update the RTL files in the path the generic component's TCL file point to.
I changed IP generation settings to "Always Regenerate design files for IP cores"
I started compilation.
Generic component file was not updated. And all the synth directory was not updated.
In short, When I have <ip_name>.ip and don't have <ip_name> synth directory of generic component IP. When running, as described above. It failed with error "<ip_name> not found"