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Altera_Forum
Honored Contributor I
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JTAG_UART interrupt (Lab 4 )

Here is my assembly code  

 

--- Quote Start ---  

# include "nios2.h" 

.text 

.equ JTAG_UART_base_address , 0x00011020 

.org 0x20 

ISR: 

rdctl et,ctl4 

beq et,r0,Skip_ea_dec 

subi ea,ea,4 

Skip_ea_dec: 

movia r4,JTAG_UART_base_address 

ldwio r5,0(r4) 

andi r5,r5,0x00ff 

stwio r5,0(r4) 

End_isr: 

eret 

.global main 

main: 

movia r8,JTAG_UART_base_address 

movia r7,1 

stwio r7,0(r8) 

movia r7,1 

wrctl ctl3,r7 

movia r7,1 

wrctl ctl0,r7 

End: 

br End 

.end 

--- Quote End ---  

 

 

Please , explain how the interrupt exception active ?
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