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Altera_Forum
Honored Contributor I
778 Views

PDA fir filter

im doing my M.E Applied Electronics in anna university at chennai.now im in final project,my title is parallel distributed arithmetic algorithm fir filter FPGA implementation.i written program for 8 tap fir filter.i have difficulty to write program for the above.so kindly help me..

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Altera_Forum
Honored Contributor I
16 Views

Distributed arithmetic as a replacement for multipliers is not the trend in field design due to its complexity. It is used in some fir IP cores e.g. xilinx fir compiler. You will need some research into xilinx fir documentation and other general literature.  

Make a search for xilinx doc "Distributed Arithmetic FIR filter v9.0"
Altera_Forum
Honored Contributor I
16 Views

i have seen that paper.i dont know how to proceed,conceptually im ok.kindly can you help me please..........

Altera_Forum
Honored Contributor I
16 Views

Hi, 

Sorry I haven't done DA and probably will never. 

Look at this doc, it has enough low level detail: 

applications of distrbuted arithmetic to digital signal processing: 

a tutorial review
Altera_Forum
Honored Contributor I
16 Views

every one who needs vhdl programmes for serial DA fir filter you can just contect me i will help you  

good luck
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