Quartus Project for DEC10_Standard_Computer?

[MReha2]

I am a professor for a US Canyon University and designing an Embedded Systems I and II class.

I am using the DE10-Standard board for these classes.

I downloaded the DE10-Standard Linux SD Card Image from the Intel site.

How or where can I get a Quartus Pro project that supports the default DEC10_Standard_Computer.rft FPGA design that comes with the DE10-Standard Linux SD Card image?

[AR_A_Intel]

Hello Welcome to INTEL forum. For any question/request regarding University Program, drop an Email to psg.university@intel.com Our university team will help and answer your question.

[MReha2]

I found some documentation in the DE10 Standard Computer with ARM.pdf that indicates I can install the University Program IP Cores from Intel’s FPGA University Program web site to get the Quartus prime project for DE10-Standard_Computer. I think I found this at the web site https://www.intel.com/content/www/us/en/programmable/support/training/university/materials-ip-cores.html?wapkw=university+ip+cores. When I go to this web site and then scroll down to the University Program Installer (Windows) section then click on the EXE link I get a network error on Windows 10 and a zero byte download on OSX. First, is this where I can get a Quartus prime project for DE10-Standard_Computer? Second, if is correct can you fix your link so I can download the project? Thanks.

[MReha2]

I FTP'd the Monitor Program using FileZile by downloading the intel_fpga_upds_setup.exe at ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/.

I then navigated to University_Program\Computer_Systems\DE10-Standar\verilog directory and opened up the Quartus project.

When I synthesize the file I get the following compiler error:

Error (12006): Node instance "edge_detection_router_controller" instantiates undefined entity "Computer_System_Video_In_Subsystem_Video_In_Edge_Detection_Subsystem_Edge_Detection_Router_Controller". Ensure that required library paths are specified correctly, define the specified entity, or change the instantiation. If this entity represents Intel FPGA or third-party IP, generate the synthesis files for the IP.

I was expecting this to compile and work because I made not changes to the system.

Do you know how to resolve this error?

[MReha2]

I downloaded the zip file intel_fpga_upds_setup.zip at ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/.

I unpacked this zip file and the Quartus Project in this archive file complies fine.

Looks like you have a network connectivity issue with your web site and the Quartus Project installed with the setup program needs to get fixed up so it compiles.

[MReha2]

Where can I get the intel_fpga_upds_setup.zip file for the DE10 Standard Computer for Quartus Prime Lite 20.1?