Intel® FPGA University Program
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SD Card Core IP with Nios II

Honored Contributor II



I am trying to interface an SD card with the FPGA (Cyclone IV EP4CE22F17C7N) on my board using the SD Core IP provided by Altera's University Program and the Nios II Embedded Processor. I am not using a development board. 


My Qsys design contains: 

Nios II Processor 

UP SD Card Core IP 

EPCS Flash 





I am very new to this "network-on-chip" or "system on programmable chip" concept, and I am finding it hard to start... I've already designed a Qsys system and instantiated it in my top-level design in Quartus II. The last thing I have to do is to get the Nios II processor to talk to both the SD card and my FPGA, but I don't know what to do. I'm familiar with HDL coding, but I'm fairly new to coding in general, and I have no idea where to start with the C code. I've tried reading all of the different documents that Altera has provided about Nios II, Qsys, etc., but I don't think it helped much. So, please bare with me as I'm sure my questions are going to sound very trivial to most of you. 


How do I connect the variables written in the Nios II C code to the variables in my top level design? Do I start coding in the main C file? If any of you have an example of the Nios II system/software that you created for your board (development board or not) using the SD card core, I would be VERY appreciative if I look at it for a reference.  


Many thanks!
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