Intel® FPGA University Program
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SD Card I/O Constrants

Altera_Forum
Honored Contributor II
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According to the SD card manual, I have to set Tco and Tsu constrains: 

 

 

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Once the core is included in your design, it will be necessary to connect the SD card ports to appropriate pins on the 

FPGA device. Table 1 shows the ports and their associated pins on the DE-series boards. Finally, it is important to 

set Tco and Tsu constraints for the SD card ports. Both parameters should be set to not more than 10ns. Should the 

parameters be omitted during design compilation, it is possible that the core may malfunction. 

 

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Can someone explain how I do this? 

 

The interface has 3 data I/O and 1 clock output. Do I constrain just the data pins? Or the clock as well?
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Altera_Forum
Honored Contributor II
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I would recommend constraining your 3 data I/O to the 1 clock output. The clock output will need the appropriate clock constraints.

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