Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
1087 Discussions

UP SD card IP core compatibility

Altera_Forum
Honored Contributor II
825 Views

Hello, 

I'm using the altera NEEK, cyclone III (3C25 FPGA) edition with the SD card included (used in the application selector example). 

I have added University SD card IP core in quartus 12.1 (using SOPC builder), and successfully created a BSP and application in NIOS II SBT, but none of the fonctions seems to work (especially, the alt_up_sd_card_is_Present() function detects the SD card even when it's unplugged, and the alt_up_sd_card_is_FAT16() function never ends because the sector index and the partition offset ar both set to 0). 

So, i'm wondering : is the UP IP core compatible with the starter boards ? Or did i just failed to add the core ? 

 

Thanks for reading.
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
78 Views

Hi, 

I am using SD Card University IP core with a DE board. I have two SD cards a 128MB and a 2GB, but none is working with the core. The cards are detected but the function alt_up_sd_card_is_FAT16() returns a wrong result. I have tested with a simple program: 

# define READ_BLOCK 17 

int main(void) { 

int *command_argument_register = ((int *)(0x0100122C)); 

short int *command_register = ((short int *)(0x01001230)); 

short int *aux_status_register = ((short int *)(0x01001234)); 

short int status; 

/* Wait for the SD Card to be connected to the SD Card Port. */ 

do { 

status = (short int) IORD_16DIRECT(aux_status_register, 0); 

} while ((status & 0x02) == 0); 

/* Read 11th sector on the card */ 

IOWR_32DIRECT(command_argument_register, 0, (10) * 512); 

IOWR_16DIRECT(command_register, 0, READ_BLOCK); 

/* Wait until the operation completes. */ 

do { 

status = (short int) IORD_16DIRECT(aux_status_register, 0); 

} while ((status & 0x04)!=0); 

 

but the aux_status_register indicates a read error on bit 5. 

My hardware is configured as shown below(VHDL): 

 

NiosII: nios_system PORT MAP ( 

b_SD_cmd_to_and_from_the_SDCard_Interface => SD_CMD, 

b_SD_dat3_to_and_from_the_SDCard_Interface => SD_DAT3, 

b_SD_dat_to_and_from_the_SDCard_Interface => SD_DAT, 

o_SD_clock_from_the_SDCard_Interface => SD_CLK, 

out_port_from_the_Display => count, 

out_port_from_the_LEDs => LEDG, 

zs_addr_from_the_sdram_0 => DRAM_ADDR, 

zs_ba_from_the_sdram_0 => DRAM_BA, 

zs_cas_n_from_the_sdram_0 => DRAM_CAS_N, 

zs_cke_from_the_sdram_0 => DRAM_CKE, 

zs_cs_n_from_the_sdram_0 => DRAM_CS_N, 

zs_dq_to_and_from_the_sdram_0 => DRAM_DQ, 

zs_dqm_from_the_sdram_0 => DRAM_DQM, 

zs_ras_n_from_the_sdram_0 => DRAM_RAS_N, 

zs_we_n_from_the_sdram_0 => DRAM_WE_N, 

clk_0 => CLOCK_CPU, 

reset_n => pll_locked and KEY(0) 

);
Reply