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Altera_Forum
Honored Contributor I
1,181 Views

Up/down counter Quartus II UP2 board

Hi guys!!! 

i'm new in altera forum, and in vhdl too. 

i must to do this project in Quartus II with the support of UP 2 board: 

 

design an up/down decimal counter that: 

1. show the count in a two 7 segment display in the UP2 board; 

2. we can select the initial number of the count by switchs; 

3. pushing the button present in UP2 board the counter must invert the count. 

 

Someone can help me??? 

I Thanks you advance..:D
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4 Replies
Altera_Forum
Honored Contributor I
87 Views

Why don't you show us what you wrote until now so that we can give you some advice?

Altera_Forum
Honored Contributor I
87 Views

Use counter from LPM library. It has most of the functionality you ask for. You need to code a HEX-to-7-segment active low decoder.

Altera_Forum
Honored Contributor I
87 Views

before to show my vhdl code i thanks you for reply me :))))  

this is my work until now: 

 

library ieee; 

use ieee.std_logic_1164.all; 

use ieee.std_logic_unsigned.all; 

ENTITY counter IS 

PORT(  

clk : in BIT;  

upordwn : in STD_LOGIC; 

initial : in STD_LOGIC_VECTOR(7 DOWNTO 0); 

count : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); 

LED_1 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); 

LED_2 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); 

LED_CENT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)); 

 

end counter; 

ARCHITECTURE prova OF counter IS 

SIGNAL totalbit : STD_LOGIC_VECTOR(7 DOWNTO 0); 

SIGNAL up_four : STD_LOGIC_VECTOR(4 DOWNTO 0); 

SIGNAL low_four : STD_LOGIC_VECTOR(4 DOWNTO 0); 

BEGIN 

PROCESS(clk) 

--QUI DEVO INSERIRE IL VALORE INIZIALE 

if(clk'EVENT AND clk='1') THEN 

if (upordwn='1') THEN 

totalbit <= totalbit+1; 

else 

totalbit <= totalbit-1; 

end if; 

end if; 

END PROCESS;  

 

low_four(0) <= totalbit(0); 

low_four(1) <= totalbit(1); 

low_four(2) <= totalbit(2); 

low_four(3) <= totalbit(3); 

 

up_four(0) <= totalbit(4); 

up_four(1) <= totalbit(5); 

up_four(2) <= totalbit(6); 

up_four(3) <= totalbit(7); 

 

WITH up_four SELECT 

--abcdefg 

LED_1 <= "00000011" WHEN "1111", -- 0 

"10011111" WHEN "1110", -- 1 

"00100101" WHEN "1101", -- 2 

"00001101" WHEN "1100", -- 3 

"10011001" WHEN "1011", -- 4 

"01001001" WHEN "1010", -- 5 

"01000001" WHEN "1001", -- 6 

"00011111" WHEN "1000", -- 7 

"00000001" WHEN "0111", -- 8 

"00001001" WHEN "0110", -- 9 

"00010001" WHEN "0101", -- A 

"00000001" WHEN "0100", -- B 

"01100011" WHEN "0011", -- C 

"00000011" WHEN "0010", -- D 

"01100001" WHEN "0001", -- E 

"01110001" WHEN "0000", -- F 

"00000011" WHEN OTHERS; 

--Lower 4 bits 

WITH low_four SELECT 

--abcdefg 

LED_2 <= "00000011" WHEN "1111", -- 0 

"10011111" WHEN "1110", -- 1 

"00100101" WHEN "1101", -- 2 

"00001101" WHEN "1100", -- 3 

"10011001" WHEN "1011", -- 4 

"01001001" WHEN "1010", -- 5 

"01000001" WHEN "1001", -- 6 

"00011111" WHEN "1000", -- 7 

"00000001" WHEN "0111", -- 8 

"00001001" WHEN "0110", -- 9 

"00010001" WHEN "0101", -- A 

"00000001" WHEN "0100", -- B 

"01100011" WHEN "0011", -- C 

"00000011" WHEN "0010", -- D 

"01100001" WHEN "0001", -- E 

"01110001" WHEN "0000", -- F 

"00000011" WHEN OTHERS; 

count <= totalbit; 

end prova; 

 

 

I have two problems yet! 

1. initialing a strart number for the count by 8 switches present in UP2 board; 

2. show the result in decimal (not in hexadecimal format) in the 7segment display. 

 

thanks again :D
Altera_Forum
Honored Contributor I
87 Views

You could include a reset signal input that would load the value from the initial input to the totalbits value. 

You can design your process this way: 

PROCESS (clk,reset) IF (reset='1') THEN -- initialization of signals and outputs ELSIF (clk'EVENT AND clk='1') THEN -- counting END IF; END PROCESS; 

To change from hexadecimal to decimal you can use the arithmetic library and divisions by 10.
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