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Using Library Models tutorial question

masterboyle
Beginner
259 Views

Hi,

I'm trying to follow the "Using Library Models" tutorial VHDL versions and I'm getting VHDL syntax errors trying to synthesize the code in the document.  I am just copying and pasting the code, and I thought I did it correctly. 

Quartus version is 20.1 lite targeting a Terasic DE-0 Nano Dev Kit. 

The errors are pointing to these lines:


BEGIN
PROCESS ( Reset, Clock )
BEGIN
IF (Reset = ’1’) THEN
Areg <= (OTHERS => ’0’) ;
Breg <= (OTHERS => ’0’) ;
Zreg <= (OTHERS => ’0’) ;
SelR <= ’0’ ;
AddSubR <= ’0’ ;
Overflow <= ’0’ ;

 

Error (10500): VHDL syntax error at addersubtractor.vhd(39) near text €
Error (10500): VHDL syntax error at addersubtractor.vhd(39) near text "€"; expecting ")", or ","
Error (10500): VHDL syntax error at addersubtractor.vhd(39) near text ™
Error (10500): VHDL syntax error at addersubtractor.vhd(40) near text €
Error (10500): VHDL syntax error at addersubtractor.vhd(40) near text "€"; expecting ")", or ","
Error (10500): VHDL syntax error at addersubtractor.vhd(40) near text ™
Error (10500): VHDL syntax error at addersubtractor.vhd(41) near text €
Error (10500): VHDL syntax error at addersubtractor.vhd(41) near text "€"; expecting ")", or ","
Error (10500): VHDL syntax error at addersubtractor.vhd(41) near text ™
Error (10500): VHDL syntax error at addersubtractor.vhd(42) near text €
Error (10500): VHDL syntax error at addersubtractor.vhd(42) near text "€"; expecting ")", or ","
Error (10500): VHDL syntax error at addersubtractor.vhd(42) near text ™
Error (10500): VHDL syntax error at addersubtractor.vhd(43) near text €
Error (10500): VHDL syntax error at addersubtractor.vhd(43) near text "€"; expecting ";"
Error (10500): VHDL syntax error at addersubtractor.vhd(43) near text ™
Error (10500): VHDL syntax error at addersubtractor.vhd(44) near text €
Error (10500): VHDL syntax error at addersubtractor.vhd(44) near text "€"; expecting ";"
Error (10500): VHDL syntax error at addersubtractor.vhd(44) near text ™
Error (10500): VHDL syntax error at addersubtractor.vhd(45) near text €

 

0 Kudos
2 Replies
SyafieqS
Moderator
244 Views

Hi Boyle,


The error indicate a syntax error near text €, fix you vhdl at line stated in the error message. Check your brackets. For every open bracket you should have a close one.


Thanks,

Regards


SyafieqS
Moderator
232 Views

Hi Brian,


Any update regarding this?


Reply