Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

VGA_VS and VGA_HS for Tpad

Altera_Forum
Honored Contributor II
806 Views

I had generated niosii core using qsys, this is the component declaration obtained, 

 

======== 

double_buffer_system u0 ( 

.clock_0_clock_in_clk (CLOCK_50), // clock_0_clock_in.clk 

.clock_0_clock_in_reset_reset_n (KEY[0]), // clock_0_clock_in_reset.reset_n 

.vga_controller_external_interface_CLK (LCD_NCLK), // vga_controller_external_interface.CLK 

.vga_controller_external_interface_HS (), // .HS 

.vga_controller_external_interface_VS (), // .VS 

.vga_controller_external_interface_DATA_EN (), // .DATA_EN 

.vga_controller_external_interface_R (), // .R 

.vga_controller_external_interface_G (), // .G 

.vga_controller_external_interface_B (), // .B 

.pixel_buffer_external_interface_DQ (), // pixel_buffer_external_interface.DQ 

.pixel_buffer_external_interface_ADDR (), // .ADDR 

.pixel_buffer_external_interface_LB_N (), // .LB_N 

.pixel_buffer_external_interface_UB_N (), // .UB_N 

.pixel_buffer_external_interface_CE_N (), // .CE_N 

.pixel_buffer_external_interface_OE_N (), // .OE_N 

.pixel_buffer_external_interface_WE_N () // .WE_N 

); 

========= 

 

This is the HSMC I/O i have, 

======== 

module double_buff( 

 

//////////// CLOCK ////////// 

CLOCK_50, 

CLOCK2_50, 

CLOCK3_50, 

 

//////////// KEY ////////// 

KEY, 

 

//////////// I2C for HSMC ////////// 

I2C_SCLK, 

I2C_SDAT, 

 

//////////// SRAM ////////// 

SRAM_ADDR, 

SRAM_CE_N, 

SRAM_DQ, 

SRAM_LB_N, 

SRAM_OE_N, 

SRAM_UB_N, 

SRAM_WE_N, 

 

//////////// HSMC, HSMC connect to LTC - 8" LCD/Touch/Camera ////////// 

CAMERA_D, 

CAMERA_FVAL, 

CAMERA_LVAL, 

CAMERA_PIXCLK, 

CAMERA_RESET_N, 

CAMERA_SCLK, 

CAMERA_SDATA, 

CAMERA_STROBE, 

CAMERA_TRIGGER, 

CAMERA_XCLKIN, 

LCD_B, 

LCD_DEN, 

LCD_DIM, 

LCD_G, 

LCD_NCLK, 

LCD_R, 

TOUCH_BUSY, 

TOUCH_CS_N, 

TOUCH_DCLK, 

TOUCH_DIN, 

TOUCH_DOUT, 

TOUCH_PENIRQ_N  

); 

 

========== 

 

I have no idea the VGA_HS and VGA_VS from the core output connected to. Can someone help?
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
86 Views

_HS stands for "Horizontal Sync" 

_VS stands for "Vertical Sync" 

 

These signals are used to align the RGB pixels on the screen. (VS will reset to the top of the screen, HS will reset to the left of the screen)
Altera_Forum
Honored Contributor II
86 Views

The problem is, there is no vs and hs input for tpad. 

 

//////////// HSMC, HSMC connect to LTC - 8" LCD/Touch/Camera ////////// 

CAMERA_D, 

CAMERA_FVAL, 

CAMERA_LVAL, 

CAMERA_PIXCLK, 

CAMERA_RESET_N, 

CAMERA_SCLK, 

CAMERA_SDATA, 

CAMERA_STROBE, 

CAMERA_TRIGGER, 

CAMERA_XCLKIN, 

LCD_B, 

LCD_DEN, 

LCD_DIM, 

LCD_G, 

LCD_NCLK, 

LCD_R, 

TOUCH_BUSY, 

TOUCH_CS_N, 

TOUCH_DCLK, 

TOUCH_DIN, 

TOUCH_DOUT, 

TOUCH_PENIRQ_N
Altera_Forum
Honored Contributor II
86 Views

The tpad from Terasic only makes use of the data valid signal and does not use H-Sync or V-Sync. If you are lucky, your controller will put out the proper data valid pattern for the display to operate properly. 

 

All that said, just let those two outputs be unconnected and hope for the best.
Reply