custom ip core

[rkaib]

I am using de2-115 withquartus.

I have created an IP core in the platform designer, addede it to my quartus project main vhdl file, compil it but it is not included whenI open eclipse.

how to exploit a custom IP data core in eclipse?

[AnandRaj_S_Intel]

Hi,

Is custom component have avalone interface??

If yes, Check the connection between slave and master.

If no, You should have avalone interface so that custom IP is visible in eclipse.

Refer below documents for custom IP creation.

ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/13.1/Tutorials/Making_Qsys_Components.pdf

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/tt/tt_my_first_nios_sw.pdf

Regards

Anand

[rkaib]

thank you anand, I will try it now

[rkaib]

hello annad. the avalon interfaces avalon available in my quartus are:

avalon mapped master,

[rkaib]

2.avalon memory mapped slave, 3. avalon streamin sink, 4.avalon streamin source. can you tell me which one to use (to be visible by eclipse)

thanks

[AnandRaj_S_Intel]

​Hi,

1. If you have avalone interface in your design then you should see it in Eclipse if you have included correct  .sopcinfo file while creating eclipse project.
2. Interface depends on the design, Please check the user guide.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf

If possible attach the project.

Regards

Anand

[rkaib]

hello anand,

I think I am using the right .sopcinfo(because it is the same working project that I modify),

I am reading the avalon interface document you have with many thanks provided.

You find attached my project: I am trying to make a custom IP ("myRossler") be visible by eclipse,

you have adviced me to add an avalon interface which I havent managed yet.

do not hesistate to ask me again if any information is needed about the project.

thanks

[AnandRaj_S_Intel]

​Hi,

Your myRossler IP dose not have any logic or avalone interface.

Add avalone interface and check the eclipse.

Thanks for update

I don't have vga subsystem to compile your design.

Regards

Anand

[rkaib]

hello anand,

I have made some change as follows:

• in Platform Designer: in my IP ("myrossler"), I have added an avalon memory mapped slave with (avalon_slave_read[1],)avalon_slave_readdata[8],avalon_slave_write[1],avalon_slave_writedata[8]),
• In quartus: in DE2_115_computer.vhd, in component and port map added my_rossler_conduit_end_read1 : ou std_logic_vector (31 downto 0); for read1,read2 and read3, then I connected them with myrossler_read1, myrossler_read2 and myrossler_read3, then I compiled.

My problem is: 12002 Port "avalon_slave_read" does not exist in macrofunction "myrossler_0"

12002 Port "avalon_slave_readdata" does not exist in macrofunction "myrossler_0"

12002 Port "avalon_slave_write" does not exist in macrofunction "myrossler_0"

12002 Port "avalon_slave_writedata" does not exist in macrofunction "myrossler_0".

just to remind you "myrossler" is a custom IP that has inputs clk and rst and outputs 3 32 bits signals that I want to exploit

Thank you very much anand

[AnandRaj_S_Intel]

​Hi,

Avalone interface is not created properly in you custom IP.

Please refer below link and project attached.

I have created a custom ip with avalone interface and single 32 bit output conduit. Refer myRossler.v and reg32.v files in project and for steps refer pdf attached.

Regards

Anand

[AnandRaj_S_Intel]

PFA

[rkaib]

hello anand,

unfortunately I could not go beyond your last post because

although now my ip "myrossler" appears in system.h it keep

displaying in eclipse "symbol 'myrossler_0_base' could not be resolved" so I can not retrieve one of the three signals that it outputs

any clue?

[AnandRaj_S_Intel]

​Hi,

Delete .sopcinfo file ->Re-generate the Qsys system -> compile the Quartus project. 

Recreate the eclipse project and check before

Regards

Anand

[rkaib]

thank you very much anand, that has been all I needed for the moment.

I really appreciate it from you.

[rkaib]

Hello Anand,

that's what I did but the problem I am getting different values, maybe I am reading from different location.

I have added these line to my eclipse code:

#define rossler (unsigned char*) MYROSSLER_0_BASE

int main()

{

for (int i=0;i<500;i++)

{

printf("%d, ", *(rossler +i));

}

}

just to remind you Anand, all I need is just retreive one of the three output 32 bits signal x, y and z.

I do not know what I miss.

[AnandRaj_S_Intel]

​We are going out of the context of the subject kindly open new case.

[rkaib]

I also want to ask you anand about the file .vhd that outputs the 3 signals, because the one that you added in the custom IP

is called myRossler.v that you created myRossler(clock, resetn,writedata,readdata, write,read,by.teenabel..))

so my question how this IP connects to that.

[AnandRaj_S_Intel]

Which .vhd?

The project which i have attached is having single register with avalone interface.

[rkaib]

Hi anand

Maybe I did not explain well, but I think it is in the problem because My initial problem was to create a custom IP using myRossler.vhd (attached) then make its outputs x,y,z visible in eclipse.

so the one you created myRossler.v doesnot provide the outputs I need ,it rather linkes the outputs using reg.v

Could you please show me how to do that using the file attached.

[rkaib]

hi Anand,

the txt file I attached "myRossler.vhd" provide as output 3 signalz x,y and z of 32 bit,

I just want you please to show me how to use your example to make these signals x,y,z

visible in eclipse.

because in the project you attached "myRossler.v" used reg32.v to output Q_export.

It is ineed visible in eclipse by the name MYROSSLER_0_BASE but doesnot give any of the 3 signals x, y or z.

can you please just tell me how to do we with "myRossler.vhd"

[AnandRaj_S_Intel]

WE ARE NOT HERE FOR CREATING PROJECT

It is ineed visible in eclipse by the name MYROSSLER_0_BASE but does not give any of the 3 signals x, y or z.

>>It's Qsys IP instance name. You have to modify myRossler.v & reg32.v as per your requirement.

It is ineed visible in eclipse by the name MYROSSLER_0_BASE but doesnot give any of the 3 signals x, y or z.

>> You will not see any signals in eclipse, You can communicate using base address check system.h for base address.

Refer below link and try to understand how PIO communicated using base address.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/tt/tt_my_first_nios_sw.pdf

Regards

Anand