running code on Opteron

[Roman1]

Hi,

I am using the latest Linux Intel Fortran 14.0.1.

I compiled my code using the following options:

 -O2 -vec-report0 -axSSE4.2 -assume buffered_io -warn noalignments  -openmp

This code works fine on my computer.  I gave the executable to another user who has AMD Opteron(tm) Processor 2384 CPU, and he told me that he is getting the following error message when he tries running the code:

"Please verify that both the operating system and the processor support Intel (R) X87, CMOV, MMX, FXSAVE, SSE and SSE2 instructions"

Does anyone know what the problem could be?  I am using the -axSSE4.2 option, but from what I have read, it should still work.  Should I remove -ax and try again?

Roman

[Tem_T_]

I've disassembled a little resulting code.

ICC generates a cpuid with check if manufacturer is GeniuneIntel if it is not it drops CPU capabilities without performing any further checks !

Then it checks the CPU capabilities and shows an error.

It seems that I need to replace ICC with MSVC or GCC for instance.

Too poor competition Intel.

[TimP]

If you intend to target amd with arch :avx don't use options which are documented as excluding amd.

If you want closer to msvc you will need also to pay attention to options such as /fp :source.

[Steven_L_Intel1]

/Qx (and -x) requires an Intel CPU. /Qax (-ax) will run on non-Intel using the "generic" code path (SSE2 by default but you can change it with /arch (-m). The bug described earlier is fixed. Please read the documentation on these options.

[Tem_T_]

OK, thanks for reply, I've found these options.

But another one question : for which purpose there's separation with these options ?

Both are specifying an instruction set. If it's about optimization for process(Intel vs Non-Intel) then maybe it should look like:

/arch:AVX (for wide number of processors)

/arch:AVX /favor:Intel (Some optimization for Intel processors)

[TimP]

As no reliable way has been documented to detect various instruction sets supported by non-Intel CPU at run time, you must choose one at compile time. Should you choose to do so, you may set options to detect when running on an Intel CPU with a newer isa.  That option may not be useful if a non-Intel CPU is your primary target.  Even among Intel cpu it's not always good to choose a multiple path option.

You may be confusing the automatic compile time selection xhost which resembles gcc march =native except for working only for Intel CPU. 

[Steven_L_Intel1]

I would disagree with Tim's last post. There is an architected method of detecting instruction subset support through the CPUID instruction. This is used by /QxHost (-xHost) and it DOES support non-Intel CPUs.

Use of /Qx (-x) does enable some Intel-specific optimizations, as called out in our Optimization Notice, and requires an Intel processor. This is the way we have chosen to do it. Other compilers may decide differently.

[TimP]

Ok I haven't had an amd CPU lately to try xhost. It's reasonable to expect it to select sse3 or avx if supported on the build platform.

noting that msvc never uses parallel simd reductions or in openmp regions, you may expect small numerical differences dependent on Ifort fp-model setting.

[Steven_L_Intel1]

If one of those is supported by /arch or -m, then yes, it will be selected. If not, then no, even if the processor supports those instructions. That is the intent, anyway, even on AMD. Sometimes we don't add /arch support for a new instruction set right away. I wrote the original code that detected CPU capabilities for /QxHost so I know how it's supposed to work. If it doesn't work we want to know about it.

[Steven_L_Intel1]

I just checked the compiler code. It will select AVX if the CPU and OS supports it, otherwise SSE4.2 is the highest level.