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CL_INVALID_BINARY when running fast_recompile example (from oneapi_cli)

asenjo
Innovator
1,413 Views

Hi,

I've followed the steps to compile the fast_recompile example that is available via oneapi_cli. I got this error when trying to run it:

u32284@s001-n081:~/code-samples/fast_recompile/build$ ./fast_recompile.fpga
Running on device: pac_a10 : Intel PAC Platform (pac_ee00000)
Caught a SYCL host exception:
Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
terminate called after throwing an instance of 'cl::sycl::runtime_error'
  what():  Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
Aborted

Thanks in advance,

Rafa.

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1 Solution
asenjo
Innovator
1,390 Views

Ok, looks like I have to be in the right node with the right FPGA. If I compile for the Arria10 I can run in a node with Arria, but if I compile for the Stratix10 (-DFPGA_BOARD=intel_s10sx_pac:pac_s10) I have to look for another node with the right FPGA:

u32284@s001-n081:~/code-samples/loop_unroll/ArriaBuild$ ./loop_unroll.fpga 
Input Array Size:  67108864
unroll_factor 1 kernel time : 242.849 ms
Throughput for kernel with unroll_factor 1: 0.276 GFlops
unroll_factor 2 kernel time : 122.319 ms
Throughput for kernel with unroll_factor 2: 0.549 GFlops
unroll_factor 4 kernel time : 63.950 ms
Throughput for kernel with unroll_factor 4: 1.049 GFlops
unroll_factor 8 kernel time : 39.567 ms
Throughput for kernel with unroll_factor 8: 1.696 GFlops
unroll_factor 16 kernel time : 37.500 ms
Throughput for kernel with unroll_factor 16: 1.790 GFlops
PASSED: The results are correct
u32284@s001-n081:~/code-samples/loop_unroll/ArriaBuild$ cd ..
u32284@s001-n081:~/code-samples/loop_unroll$ cd StratixBuild/
u32284@s001-n081:~/code-samples/loop_unroll/StratixBuild$ ls
CMakeCache.txt  cmake_install.cmake  compile.sh.e726724  loop_unroll.fpga  Makefile
CMakeFiles      compile.sh           compile.sh.o726724  loop_unroll.prj   src
u32284@s001-n081:~/code-samples/loop_unroll/StratixBuild$ ./loop_unroll.fpga 
Input Array Size:  67108864
Caught a SYCL host exception:
Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
terminate called after throwing an instance of 'cl::sycl::runtime_error'
  what():  Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
Aborted
u32284@s001-n081:~/code-samples/loop_unroll/StratixBuild$

 

Then, reading here: https://github.com/intel/FPGA-Devcloud/tree/master/main/Devcloud_Access_Instructions#devcloud-access-instructions

I found how I can request the right node. The problem now is that I'm not authorized:

u32284@login-2:~$ devcloud_login -b A10PAC
You are already logged into node  interactively.
u32284@login-2:~$ devcloud_login -b A10PAC
Invalid Entry. Valid development stack options are: 1.2 1.2.1
eg: devcloud_login -I A10PAC 1.2 
u32284@login-2:~$ devcloud_login          

You are selecting an interactive compute server sesssion. Please consider using batch mode submission using
devcloud_login -b to not tie up compute servers with idle sessions.
See the help menu using devcloud_login -h for more details.

What are you trying to use the Devcloud for? 

1) Arria 10 PAC Compilation and Programming - RTL AFU, OpenCL
2) Arria 10 - OneAPI, OpenVINO
3) Stratix 10 PAC Compilation and Programming - RTL AFU, OpenCL
4) Compilation (Command Line) Only
5) Enter Specific Node Number

Number: 3
running: qsub -q batch@v-qsvr-fpga -I -l nodes=s001-n189:ppn=2
qsub: submit error (Unauthorized Request  MSG=group ACL is not satisfied: user u32284@login-2, queue batch)

Any help?

Thanks,

Rafa.

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3 Replies
asenjo
Innovator
1,391 Views

Ok, looks like I have to be in the right node with the right FPGA. If I compile for the Arria10 I can run in a node with Arria, but if I compile for the Stratix10 (-DFPGA_BOARD=intel_s10sx_pac:pac_s10) I have to look for another node with the right FPGA:

u32284@s001-n081:~/code-samples/loop_unroll/ArriaBuild$ ./loop_unroll.fpga 
Input Array Size:  67108864
unroll_factor 1 kernel time : 242.849 ms
Throughput for kernel with unroll_factor 1: 0.276 GFlops
unroll_factor 2 kernel time : 122.319 ms
Throughput for kernel with unroll_factor 2: 0.549 GFlops
unroll_factor 4 kernel time : 63.950 ms
Throughput for kernel with unroll_factor 4: 1.049 GFlops
unroll_factor 8 kernel time : 39.567 ms
Throughput for kernel with unroll_factor 8: 1.696 GFlops
unroll_factor 16 kernel time : 37.500 ms
Throughput for kernel with unroll_factor 16: 1.790 GFlops
PASSED: The results are correct
u32284@s001-n081:~/code-samples/loop_unroll/ArriaBuild$ cd ..
u32284@s001-n081:~/code-samples/loop_unroll$ cd StratixBuild/
u32284@s001-n081:~/code-samples/loop_unroll/StratixBuild$ ls
CMakeCache.txt  cmake_install.cmake  compile.sh.e726724  loop_unroll.fpga  Makefile
CMakeFiles      compile.sh           compile.sh.o726724  loop_unroll.prj   src
u32284@s001-n081:~/code-samples/loop_unroll/StratixBuild$ ./loop_unroll.fpga 
Input Array Size:  67108864
Caught a SYCL host exception:
Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
terminate called after throwing an instance of 'cl::sycl::runtime_error'
  what():  Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
Aborted
u32284@s001-n081:~/code-samples/loop_unroll/StratixBuild$

 

Then, reading here: https://github.com/intel/FPGA-Devcloud/tree/master/main/Devcloud_Access_Instructions#devcloud-access-instructions

I found how I can request the right node. The problem now is that I'm not authorized:

u32284@login-2:~$ devcloud_login -b A10PAC
You are already logged into node  interactively.
u32284@login-2:~$ devcloud_login -b A10PAC
Invalid Entry. Valid development stack options are: 1.2 1.2.1
eg: devcloud_login -I A10PAC 1.2 
u32284@login-2:~$ devcloud_login          

You are selecting an interactive compute server sesssion. Please consider using batch mode submission using
devcloud_login -b to not tie up compute servers with idle sessions.
See the help menu using devcloud_login -h for more details.

What are you trying to use the Devcloud for? 

1) Arria 10 PAC Compilation and Programming - RTL AFU, OpenCL
2) Arria 10 - OneAPI, OpenVINO
3) Stratix 10 PAC Compilation and Programming - RTL AFU, OpenCL
4) Compilation (Command Line) Only
5) Enter Specific Node Number

Number: 3
running: qsub -q batch@v-qsvr-fpga -I -l nodes=s001-n189:ppn=2
qsub: submit error (Unauthorized Request  MSG=group ACL is not satisfied: user u32284@login-2, queue batch)

Any help?

Thanks,

Rafa.

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ChithraJ_Intel
Moderator
1,382 Views

Hi Asenjo,


Thanks for reaching out to us.

As checking your query, we could find that you are using FPGA devcloud. So, we are moving this query to FPGA forum for a faster response.


Regards,

Chithra J


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AnilErinch_A_Intel
1,303 Views

Hi,

There is an access control list (ACL) for each of the nodes. If you want to access s10 , please put up a request with your local intel contact point and they should be able to help.

Thanks and Regards

Anil


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