Deep dive for FPGA compilation.

[Ajmeer_Khan]

Hi ,

I have compiled the kernel code and source code using dpc++. I want to know,   how dpc++ compiler differentiate the kernel code and source code and how to compile the source code and kernel code seperately and how to generate the bitstream for FPGA and how to link host code and device code.

Regards,

Ajmeer Khan M

[RahulV_intel]

Hi Ajmeer,

To compile only the device code, you may use this compilation flag "-fsycl-device-only".

To know more about the compilation process, kindly refer to the below links:

https://github.com/intel/llvm/blob/sycl/sycl/doc/CompilerAndRuntimeDesign.md

https://github.com/intel/llvm/tree/sycl/sycl/doc

https://software.intel.com/content/dam/develop/external/us/en/documents/oneapi-programming-guide.pdf

Since your question is related to FPGA, please note that we have redirected it to the FPGA forum for a faster response.

Thanks,

Rahul

[EBERLAZARE_I_Intel]

Hi,

May I know if you are still facing the issue?