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526 Discussions

Intel FPGA SDK for OpenCL : how to generate an aocx file by the output of the OpenCL parser?

caron
Beginner
672 Views

I want to modifying the Verilog code in the output of the OpenCL parser. Which is generated by the command "aoc -c -g device/vector_add.cl". And then I want to generate .aocx file from the folder. Anyone know how to do that ?

thank you !!

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1 Reply
Fawaz_J_Intel
Employee
295 Views
Hello, You can do that, however, this might change the functionality of the design. Furthermore, it might bring some timing issues which will increase the design complexity. Thanks
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