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[LarryS1]

Message removed by author as moot

[Hazlina_R_Intel]

Hi,

Thanks for your question. May I know the simulation/emulation or coding environment or tool that you use? What device are you targeting for your code, is it an FPGA or CPLD?

-Hazlina

[LarryS1]

This is using Intel OpenCL SDK for FPGA, v 19.4 (20.3 does the same thing).

The hardware target is Stratix 10 MX, but the failure happens in emulation.