Intel® High Level Design
Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™
677 Discussions

RTL Simulation failed : Enqueue process failed

DorianL
Novice
542 Views

Hi,

 

I tried to simulate my IP which is a video processing and when i compile and run emulation, everything work fine but then i tried to compile and run the RTL Simulation but unfortunately i can compile but not run it. I have the error "Caught a synchronous SYCL exception : Enqueue process failed". Do you have an idea of what type of error it could be and why is it compiling but not running ? Thank you !

 

DorianL

0 Kudos
5 Replies
ZH_Intel
Employee
396 Views

Hi Dorian,

 

Thank you for reaching out.

Apologize for the delayed response as we encounter some technical difficulty.

Just to let you know that Intel has received your support request and currently we are confirming the details with our internal team.

I shall come back to you with findings.

 

Thank you for your patience.

 

Best Regards,

ZH_Intel


0 Kudos
ZH_Intel
Employee
330 Views

Hi Dorian,

 

Good day.

Apologize for the delayed response.

Allow me to clarify some of the items below:


1. May I know which device and board you are using for your project?


2. When you mention Video processing, which Video IP are you using for your project?


3. May I know did you generate the design example or custom design?


4. Could you share with us your design?


5. Could you share with me your which Quartus version and operating system you are using for your project? We would like to replicate the error from our end to further identify the issue.


Hoping to hear back from you so that we can proceed for next step.

Thank you.

 

Best Regards,

ZH_Intel


0 Kudos
ZH_Intel
Employee
268 Views

Hi Dorian,

 

Good day.

I wish to follow up with you about this case.

I would like to get update on my previous reply.


1. May I know which device and board you are using for your project?


2. When you mention Video processing, which Video IP are you using for your project?


3. May I know did you generate the design example or custom design?


4. Could you share with us your design?


5. Could you share with me your which Quartus version and operating system you are using for your project? We would like to replicate the error from our end to further identify the issue.


Hoping to hear back from you so that we can proceed for next step.

Thank you.

Best Regards,

ZH_Intel


0 Kudos
whitepau
Employee
246 Views

that error sometimes shows up in designs that use host pipes to get data into/out of your kernels (like you would in a video design that uses streaming interfaces for I/O)

 

Have you been able to successfully compile our Convolution 2D code sample?

https://github.com/oneapi-src/oneAPI-samples/tree/development/DirectProgramming/C%2B%2BSYCL_FPGA/ReferenceDesigns/convolution2d

 

Also make sure you are using the latest 2024.1 compiler.

0 Kudos
ZH_Intel
Employee
194 Views

Hi Dorian,

 

Good day.

We have not heard feedback from you for quite sometime with regards to the previous reply that I have provided and this Case is idling. 

Since there is no response from you for more than a week, this thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

 

Stay safe, and I hope you have a great day.

Thank you.

Best Regards,

ZH_Intel


0 Kudos
Reply