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Rapidio port_initialized

fpga_2022
Beginner
‎02-23-2022 10:14 PM
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hello,

         Recently, I used Rapidio to test the loop test, I checked the clock and reset signal, the port_initialized signal is always low, there is no way to link initialization，quartus prime pro edition 18.1

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AminT_Intel
Employee
‎02-27-2022 09:38 PM
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Hello,

 

Intel is discontinuing this IP. Please refer to this link: https://www.intel.com/content/www/us/en/products/details/fpga/intellectual-property/interface-protocols/rapid-io-phy.html 

 

Thank you

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AminT_Intel
Employee
‎03-02-2022 11:05 PM
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In response to AminT_Intel

 We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

In response to AminT_Intel
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