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574 Discussions

SVM(shared virtual memory) available on OpenCL FPGA?

KishoreVarma
Novice
275 Views

SVM

OBFS, This project requires SVM functionality, They are using HARPv2 as per ReadMe, which is xeon+Arria10 FPGA. Even in Devcloud, we have Xeon+ A10 configuration. I know Intel supports OpenCL 1.2 and doesn't yet support OpenCL 2.0 Fully, just some functionality like pipes/channels are supported.

I tried using SVM 

 int* n  = (int*)clSVMAlloc(context(), 0, sizeof(int), 1024);
 if(!n) cout<<"allocation error\n";

But getting allocation error. 

Is SVM available on Intel OpenCL FPGA Arria 10 devices on DevCloud? 

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1 Solution
KishoreVarma
Novice
177 Views

My bad, HARPv2 is "Xeon CPU+arria10 FPGA" on a single chip. it seems SVM functionality is not yet there on Intel FPGAs on devcloud, as Intel is still stuck at OpenCL 1.0 or 1.2 and not fully confronted to OpenCL 2 or 3,  Makes sense as intel shifted to OneAPI leaving OpenCL.

View solution in original post

4 Replies
BoonBengT_Intel
Moderator
237 Views

Hi @KishoreVarma,


Thank you for posting in Intel community forum and hope all is well.

It seems that the mention references project are not coming from Intel reference design, hence we have limited knowledge on the project to further advise on. However we would try our best to support on the queries you have.


For the mention queries, there is a details explanation on how to utilize SVM on opencl as below:

- https://www.intel.com/content/www/us/en/developer/articles/technical/opencl-20-shared-virtual-memory...

Please do refer to the section 'Detecting the Supported SVM Type' to check on the availability on the device.

Hope that helps.


Best Wishes

BB


KishoreVarma
Novice
221 Views

@BoonBengT_Intel 

I am not asking particularly about that project, What i am asking is whether SVM is supported on intel FPGA.

 

For example, Consider this one (vector addition) which is from INTEL, just download the source code and try to execute it.

 

Add this below at the beginning of the main.cpp file to use SVM and compile using make

#define USE_SVM_API 1

 

cd exm_opencl_vector_add_x64_linux/vector_add/
make

 

Similarly compile for device (using pac_a10 device on devcloud). 

 

cd exm_opencl_vector_add_x64_linux/vector_add/device
tools_setup -t A10DS
aoc -report -v ./vector_add.cl

 

Now since its compiled (vector_add.aocx generated), sign it if necessary.

 

Run bin/host, and output says SVM is not supported.

 

Initializing OpenCL
Platform: Intel(R) FPGA SDK for OpenCL(TM)
Using 1 device(s)
  pac_a10 : Intel PAC Platform (pac_ee00000)
Using AOCX: vector_add.aocx
The host was compiled with USE_SVM_API, however the device currently being targeted does not support SVM.
Segmentation fault (core dumped)

 

 

I just want to get confirmation if SVM support is there for intel FPGA's, because even in some official  Intel OpenCL FPGA examples i have seen SVM usage,

 

But here when queried for svm capabilties or even using clinfo, we get to know device not supported.

 

 

 

KishoreVarma
Novice
178 Views

My bad, HARPv2 is "Xeon CPU+arria10 FPGA" on a single chip. it seems SVM functionality is not yet there on Intel FPGAs on devcloud, as Intel is still stuck at OpenCL 1.0 or 1.2 and not fully confronted to OpenCL 2 or 3,  Makes sense as intel shifted to OneAPI leaving OpenCL.

BoonBengT_Intel
Moderator
144 Views

Hi @KishoreVarma,

 

Good to know that you managed to figure things outs and thanks for sharing the insights here too.

With no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

Thank you for the questions and as always pleasure having you here.

 

Best Wishes

BB

 

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