Above I mentioned error which sometimes happens after cosimulation or compilation is done (using Makefile). Usually, the problem occurs when an already existing cosimulation or compilation folder exists.
When the problem occurs, the cosimulation or compilation has to be done again and then the results are provided.
What helps sometimes is deleting the existing folder, but it is not a condition to successful report output.
Do you know, what could be the cause of this?
Dear forum user, you have come to Intel FPGA forum site, we have expertise to answer your question related to FPGA technology and usage. Unfortunately we do not understand the nature of your question above, could you kindly help to elaborate if your question is FPGA related? If not, please post your question to the right forum site so the appropriate expert could provide you with more helpful guidance. I will hereby put your case to close-pending. Thank you.
I am really sorry. Now I see the topic has been set to High Level Design and not to High Level Synthesis. I apologize for my mistake and I will repost the question with the topic properly set, since I don't see an option to delete High Level Design topic. Thank you for your response.
Sadly, I haven't stored any corrupted HTML as long as it was good for nothing. The remote server on which I work was the first culprit I suspected. But summary data were invalid even after reloading folders a couple of times.
I've tried to replicate the error but wasn't successful. I will upload the files if I encounter the problem in the future.
If you have encounter the same problem, you can upload the file here so that we can further more investigating and debugging the problem.
Also, if you are facing any problem that is different from this problem, I would like to suggest to open another new forum for better support.