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I am trying to compile a project for S10 FPGA. I keep getting this error.
Not sure why.
Any help would be appreciated.
Thanks,
Gil.
/usr/sbin/kill-illegit-procs: line 6: /etc/kill-illegit-procs.cfg: No such file or directory
/usr/sbin/kill-illegit-procs: line 108: /dev/shm/kip-procs-1619915911.tmp: No such file or directory
/usr/sbin/kill-illegit-procs: line 108: /dev/shm/kip-procs-1619915971.tmp: No such file or directory
/usr/sbin/kill-illegit-procs: line 108: /dev/shm/kip-procs-1619916031.tmp: No such file or directory
/usr/sbin/kill-illegit-procs: line 108: /dev/shm/kip-procs-1619916091.tmp: No such file or directory
/usr/sbin/kill-illegit-procs: line 108: /dev/shm/kip-procs-1619916151.tmp: No such file or directory /usr/sbin/kill-illegit-procs: line 108: 2702 Killed pbsnodes `hostname`
2703 | grep -e "^[ ]*jobs ="
2704 | awk '{print $3}'
2706 | tr "," "\n"
2707 | sed 's~^[0-9\-]*/~~' >> $JF
Link Copied
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I haven't seen this type of error before. Do you compile the design using the Quartus tool?
If so, could you try to reinstall Quartus and compile again? If issue persists, kindly help to share your design (preferable .qar file) to duplicate the error.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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Richard,
I am using the Intel Devcloud to compile the design (I cannot re-install Quartus). I have multiple files that I compile and link. I use the following commands:
dpcpp -fintelfpga -I /home/u50480/gsl/include -c -o file1.o file1.cpp
dpcpp -fintelfpga -I /home/u50480/gsl/include -c -o filen.o filen.cpp
To link I use the following command:
dpcpp -rdynamic -fintelfpga -Xshardware -o executable_file_name file1.o ... filen.o
It seems that the error is happening on the nodes with S10 oneAPI cards. I compiled the same design on compute Only nodes (Which by default compiles for Arria10 ) and the compile finished without errors. I am not sure as of now if this has to do with just the nodes that I am compiling on or if this happens when I target S10 FPGA. I am trying to figure out how to compile on compute only nodes and target S10 Cards. This hopefully will let me know if this an install issue on some servers of if it has to do with targeting S10 Cards.
Thanks,
Gil.
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I am sorry to say that I have no knowledge on this but rest assured, this case will be handled by one of my colleagues who will help you on this issue.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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Hi @GilbertZeidan,
Thank you for posting in Intel community forum, hope this message find you well and apologies for the delayed in response.
May I know which design did you copy and tried to compile? And do you have the devcloud node# which you mention the failing if happening?
Suspecting that it might just be a issues in the targeted hardware in the nodes.
Perhaps would suggest to try and specify the compute node followed by the compilation to see if that works.
You may refer to the section 'Running Samples In DevCloud' in the link here.
Best Wishes
BB
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Hi @GilbertZeidan,
Greetings, unfortunately as we do not receive any further clarification on what is provided. Hence this thread will now be transitioned to community support. If you have new queries or further query on this thread, please feel free to open a new thread or reopen this thread to get support from us. Otherwise, the community users will further help you with doubts in this thread.
Best Wishes
BB
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