The Intel compiler documentation includes some advice about use of explicit prefetch, as well as the opt-prefetch global compile option, and loop level prefetch pragmas. There are additional specialized options for IA64 (Itanium). All recent Xeon and AMD CPUs have effective hardware prefetch implementations, so the role of software prefetch is limited to situations not covered by the hardware, such as early new page fetches where the programmer knows the addresses in advance, possibly in situations where some of the hardware prefetch options are disabled. The compiler options cover single level indirection in a loop. CPUs which are no longer in production, such as P-III, Athlon32, P4, allowed for use of prefetch in ways which aren't useful for current and future CPUs, such as those for which this forum was started. So, as the other reply said, we can't guess if you are on the right track, without some information from you.
