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Let me start with: I know that LZCNT is not supported on the Core i7.
However when I run theinstruction on my Core i7 I do not as I expect get an illegal instruction exception.
Instead it performs a BSR instruction.
This is while working in 64 bit mode and using 64 bit registers.
Is this a bug, expected behaior or is running unsupported instructions undefined (and this is therefore OK)?
For reference the opcodes are:
BSR: 0xBD
LZCNT: 0xBD (Same as BSR but has a prefix of 0xF3)
Any feedback would be helpful.
CJ.
However when I run theinstruction on my Core i7 I do not as I expect get an illegal instruction exception.
Instead it performs a BSR instruction.
This is while working in 64 bit mode and using 64 bit registers.
Is this a bug, expected behaior or is running unsupported instructions undefined (and this is therefore OK)?
For reference the opcodes are:
BSR: 0xBD
LZCNT: 0xBD (Same as BSR but has a prefix of 0xF3)
Any feedback would be helpful.
CJ.
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It is not a bug. AMD decided to take a valid encoding (prefix+ BSR) that was unlikely to be used by software and repurpose it for LZCNT. The prefix had no funtional effect on BSR.
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It is not a bug. AMD decided to take a valid encoding (prefix+ BSR) that was unlikely to be used by software and repurpose it for LZCNT. The prefix had no funtional effect on BSR.

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