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Hello All,
First of all, sorry this is not in the appropriate forum but I was directed to post this here.
I have a question that's been bugging me regarding the PCIe Root Complex and the PCH and I'm hoping someone will be able to help clear things up a bit.
I've always presumed that the PCIe Root Complex was a combination of the CPU and the PCH as they both contain PCIe Root Ports, thereby connecting PCIe devices to CPU/memory.
It is my understanding from a software point of view that at Bus 0 Device 0 of the PCI config space you have the Root Bridge, that produces Bus 0. On Bus 0 you then have logical PCI - PCI bridges that are the Root Ports, which PCIe devices are behind. Bus 0 starts in the CPU and crosses the DMI into the PCH which also has Root Ports.
A line in the 'PCI Express System Architecture' says "Bus 0 is an internal virtual bus within the Root Complex". This is agrees with what I thought, that both the CPU and PCH are part of the Root Complex as Bus 0 is in both the CPU and PCH.
I then read online regarding the "The Lynx Point chipset is much like current platforms (P55, P67, Z68), a platform controller hub (PCH). It handles all the connectivity of the system, but lacks the main PCI-Express root complex which is instead embedded on the CPU. The chipset does however, include an 8-lane PCIe hub, in order to wire out x4 and x1 expansion slots as well as onboard controllers"
The above makes it sound like the PCIe Root Complex is a 'thing' residing within the CPU.
So I'm just a bit unsure regarding what the PCIe Root Complex is.
I know the Root Complex encapsulates CPU transactions into PCIe packets. I presumed this occurred at the Root Ports, so for example a CPU transaction to a PCIe sound card connected to the PCH, when does this become a PCIe transaction? Is it in the uncore part of the CPU, or is it near the Root Port of the PCH.
If anyone could help clear things up for me it would be greatly appreciated.
Kind Regards,
RJSmith92
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- Intel® Advanced Vector Extensions (Intel® AVX)
- Intel® Streaming SIMD Extensions
- Parallel Computing
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Did you try to read latest Intel chipset specification/datasheets?
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Is this description helpful: http://en.wikipedia.org/wiki/Root_complex
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Thanks iliyapolak,
Yes I've read the Chipset and CPU datasheets but they don't really say much regarding the issue.
I've looked online a lot and can't seem to find a straight answer, and I was just wondering if someone could give a definitive answer regarding PCIe for the CPU and PCH?
Any ideas where I may be able to speak with someone who may know?
Kind Regards,
Robert
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