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Bea_T_
Beginner
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small typo in Intel® 64 and IA-32 Architectures Software Developer’s Manual

Hi,

It seems that there is a small typo in the Intel® 64 and IA-32 Architectures Software Developer’s Manual (Order Number: 253665-054US April 2015), page 3-149 (cmpss instruction) :

128-bit Legacy SSE version: The first source and destination operand (first operand) is an XMM register. The second source operand (second operand) can be an XMM register or 64-bit memory location.

It should be 32-bit memory location.

Regards,

BeatriX

 

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1 Reply
MarkC_Intel
Moderator
84 Views

Thanks. I'll route this to the documentation team.

BTW, revision 55 was released yesterday. http://www.intel.com/sdm

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