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Regarding the L1-dcache-loads events, Is it only include the memory access instructions submitted? Isthe perfetch included in it ? How about the memory access instructions followed by a wrong branch prediction?
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I am not sure if this question is related to IPP library. It seems you could address this topic against Analyzer ( specifically VTune ) Forum - https://community.intel.com/t5/Analyzers/bd-p/analyzers
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