IPP is designed to work on any processor which is 100% compatible with Intel Architecture. IPP dispatches optimized code based on processor features and not on manufacturer name. It means, at run time it check if processor support SSE instruction set then SSE optimized code will be used, if SSE2 support is availble then SSE2 optimized code will be launched and so on.
To my knowledge, IPP will use MMX & SSE's (no 3DNow I would guess), but certainly isn't supposed to require them.
-however- it has probably been designed for Intel's only, meaning that it's not likely to be as optimized for AMD's.
My previous CPU was an AMD Athlon (supports SSE4 I think?) and I know there were IPP functions that I wasn't using in favor of my own that were faster. On my new Intel CPU, I've switched to at least one of the IPP ones which is now faster (it's weird btw, it's a simple peak function on single floats, on my AMD an integer code was faster than IPP's SSE1 code)
IPP dispatches optimized code based on processor features and not on manufacturer name.
Weird, I thought it would be. I mean, knowing that clock cycles, pairing rules, latencies & whatever dependencies can change from a CPU to another, I thought that specific CPU's could benefit from other code, or slight variations of the code for another CPU.