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idata
Community Manager
1,594 Views

Creating a non-UEFI firmware

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Hi,

I am trying to develop an independent operating system for the Intel Galileo platform and I would like to ask you a few questions about it.

1. How are the contents of the flash chip initialized to the RAM or how much is the Intel Quark SoC X1000 automatic in this task?

2. How is the structure of the flash chip contents organized, if there is any agreed concept of structure (besides that the chip starts to read code from 0xFFFF0)?

3. If I would like to avoid using an existing BIOS (as the image of Coreboot with SeaBios for example I tried to compile with its utilities was weirdly organized (everything, God knows why, was placed in the top 2 MB as well as the boot sequence (last 16 Bytes))),

 

what activities should my binary do prior to initializing a custom non-UEFI OS (in terms of initializing PCI devices etc.) and where could I find a summary of them?

4. How could I compile an OS/firmwareentirely written in assembly with the Intel syntax to a pure binary to upload it to the flash when it is divided into a 16-bit and a 32-bit segment and where could I find information about it?

I am a student intending to use this as an objective of my diploma thesis, so I would really appreciate any helpful answer. Thank you in advance.

Václav Plavec

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1 Solution
idata
Community Manager
76 Views

Hello Vaclav,

 

 

Thank you for your patience.

 

 

Information regarding the Intel Quark SoC X1000 and its content can be found in the datasheet and the UEFI firmware guide:

https://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html https://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html

https://www.intel.com/content/dam/www/public/us/en/documents/guides/quark-x1000-uefi-firmware-writer... https://www.intel.com/content/dam/www/public/us/en/documents/guides/quark-x1000-uefi-firmware-writer...

A community member provided a patch that can be useful for a non-UEFI OS: /thread/51481 https://communities.intel.com/thread/51481

JTAG debugging operates with the software/hardware as it is necessary to analyze chips.

Useful community threads:

/thread/45976 https://communities.intel.com/thread/45976

/thread/48127 https://communities.intel.com/thread/48127

 

 

Hope this helps.

 

 

Regards,

 

Octavian

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4 Replies
idata
Community Manager
76 Views

Hello Vaclav,

 

 

Thank you for your interest in our Intel products.

 

 

We are going to investigate further to try and gather the information requested and then we will get back to you.

 

 

Regards,

 

Octavian
idata
Community Manager
76 Views

Dear mr. Octavian,

I really appreciate your favor and selflessness and thank you very much in advance. Your help will be truly very helpful for me and my investigation in your technologies. I have always reckoned that the Intel company could always offer a competent support for students and people who are interested in their technologies. I am really looking forward to receiving any more information from you.

Yours sincerely,

Václav Plavec

idata
Community Manager
76 Views

Dear mr. Octavian,

I would like to append one more question that appeared during my investigation: Is the JTAG debugging interdace connected to a "standalone" controller on the SoC and does it operate automatically independent on the software or is it necessary to handle it in the SW and in that case how would it be possible to handle it? I am asking because I was just trying to use the OpenOCD debugging SW through the BusPirate interface connected to the Galileo's JTAG and it refused to execute the halt command to enable me to read i.e. values of the registers etc., claiming that "lakemont halt target not running". Thank you in advance for any information given.

Yours sincerely,

Václav Plavec

idata
Community Manager
77 Views

Hello Vaclav,

 

 

Thank you for your patience.

 

 

Information regarding the Intel Quark SoC X1000 and its content can be found in the datasheet and the UEFI firmware guide:

https://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html https://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html

https://www.intel.com/content/dam/www/public/us/en/documents/guides/quark-x1000-uefi-firmware-writer... https://www.intel.com/content/dam/www/public/us/en/documents/guides/quark-x1000-uefi-firmware-writer...

A community member provided a patch that can be useful for a non-UEFI OS: /thread/51481 https://communities.intel.com/thread/51481

JTAG debugging operates with the software/hardware as it is necessary to analyze chips.

Useful community threads:

/thread/45976 https://communities.intel.com/thread/45976

/thread/48127 https://communities.intel.com/thread/48127

 

 

Hope this helps.

 

 

Regards,

 

Octavian

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