Edison MRAA SPI Problems with Multiple byte transfers

[MDool1]

I am using libmraa to send SPI data on my Edison, but when looking at the wires my data is being transferred as individual bytes instead of all together (chip select goes high between each byte). In order to interface with my SPI devices, I need both read and write to operate with multiple bytes, how can I fix this?

Mike

[MDool1]

To give some more information, here's a screenshot of my issue. This action came from the libmraa command "spiDev->transfer(sendBuffer, bytesArray, 3)" where 3 is the length of the entire entire transaction. I need the chip select to low for all three bytes, ideally with no stoppage of clocking. Is this possible? The signals in question are below the hex values in the logic analyzer.

[idata]

Hi Mike,

Could you tell us which is the image version and MRAA version you are using?Also, could you post a snippet of the code you are testing?The SPI functions for MRAA allows to use packages of 8 and 16 bits: http://iotdk.intel.com/docs/master/mraa/spi_8h.html http://iotdk.intel.com/docs/master/mraa/spi_8h.htmlWhich is the size of the data you want to use in your code?If the size is higher than the allowed for the library you will need to edit your code in order to use the correct data when it is received.If you need a configuration without the stoppage of the clock signal you will need to edit the MRAA library because it doesn't have a function/feature to allow this behavior. Is something like the repeated start works for you? If it does, take a look at this library: https://github.com/sajingeo/i2crw https://github.com/sajingeo/i2crw Regards,Charlie

[MDool1]

I appreciate the speedy response!

I am using Ubilinux Debain Wheezy, with MRAA version 0.9.6. Here's a snippet of the code I am running:

In this bit I am trying to write a one-byte read op-code and receive two more bytes in the same transaction (in the same chip select transaction).

Here is a diagram of what I am looking for, with multiple bytes being transmitted in one chip select valley (clock continuity is not as important I don't think, if there is a point of high clock and low CS things should go okay but I would rather not have large gaps between bytes):

It seems like there must be a way to do this, maybe I've just been overlooking something!

Thank you for any help you can offer!

Mike

[idata]

Hi Mike,

For further information regarding Ubilinux, please contact http://www.emutexlabs.com/forum/index http://www.emutexlabs.com/forum/indexUsing MRAA you can't get the behavior you want, as you posted in the second post, after every package that is sent the clock stops. If you want to have a continuous clock signal to receive different packages you will need to use another approach.You can use spidev, spi-tools or a custom library that allows this behavior. Look at the following links, I hope it helps to give you an idea on how to start trying with another approach.http://tightdev.net/SpiDev_Doc.pdf http://tightdev.net/SpiDev_Doc.pdfhttps://github.com/cpb-/spi-tools https://github.com/cpb-/spi-tools http://armbedded.eu/node/318 http://armbedded.eu/node/318 Regards,Charlie