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YLu11
New Contributor I
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How many mips can the onboard MCU execute?

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Hello, I tried searching online but failed to find specifications about the MCU used in Intel Edison.So can anyone tell me how many MIPS can the MCU execute?

Thanks in advance.

1 Solution
idata
Community Manager
68 Views

Hi lyfkyle,

 

 

The MIPS value can be calculate with the clock rate (MHz) and the cycles per instruction (CPI). According to the information in the following site:https://www.google.com/url?q=https://software.intel.com/en-us/node/545142&sa=D&sntz=1&usg=AFQjCNHZrV... https://software.intel.com/en-us/node/545142, the MCU subsystem is based on the i486 architecture and it runs at 100MHz when it's fully active.

 

 

According to the article "The i486 CPU: Executing Instructions in One Clock Cycle", the CPI of the i486 is 1 (one cycle per instruction). This means that the MIPS value would be 100MIPS, but let me double check this to be sure.

 

 

Regards,

 

Diego

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2 Replies
idata
Community Manager
68 Views

I don't know, but I can tell you that single core C programm can calc up to 170 000 SHA1 per second

why are you interested in this?

You can find some benchmarks here:

http://www.davidhunt.ie/raspberry-pi-2-benchmarked/ http://www.davidhunt.ie/raspberry-pi-2-benchmarked/

Flo1991

idata
Community Manager
69 Views

Hi lyfkyle,

 

 

The MIPS value can be calculate with the clock rate (MHz) and the cycles per instruction (CPI). According to the information in the following site:https://www.google.com/url?q=https://software.intel.com/en-us/node/545142&sa=D&sntz=1&usg=AFQjCNHZrV... https://software.intel.com/en-us/node/545142, the MCU subsystem is based on the i486 architecture and it runs at 100MHz when it's fully active.

 

 

According to the article "The i486 CPU: Executing Instructions in One Clock Cycle", the CPI of the i486 is 1 (one cycle per instruction). This means that the MIPS value would be 100MIPS, but let me double check this to be sure.

 

 

Regards,

 

Diego

View solution in original post

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