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JHasa
Novice
1,506 Views

Quark SE C1000 VCCOUT_QLR1_3P3 power down after QMSI 1.4.0 upload

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Hi.

I am trying to develop board with Quark C1000.

When i access first time to my board, i can find connected to serial message on System Studio, can update ROM and can launch firmware.

But after i update ROM to QMSI 1.4.0 than VCCOUT_QLR1_3P3(K5) is down to 0V(It was 3.3V before update rom) and cannot update ROM and cannot launch firmware.

VCCOUT_HOST_1P8(K6) and VCCOUT_QLR2_1P8(K4) also down to 0V.

Could it be due to QMSI 1.4.0?

If so, how can i fix it?

VCCOUT_QLR1_3P3(M3) pin is connected with

COMP_AREF(H9)

VCC_IO_AON(H10)

VCC_IO_AON1(F6)

VCC_IO_AON2(G8)

VCC_ADC_3P3(M10)

VCC_CMP_3P3[2](M8)

VCC_VSENSE_ESR1(L5)

VCCOUT_ESR1_3P3(M5)

in my board.

And my development environment

Windows 7

System Studio 2016.2.094 for Microcontrollers Update 2

Thanks,

Jeong

Jeong Hasang 님이 메시지를 편집했습니다.

1 Solution
JHasa
Novice
190 Views

Finally solved! I got C1000 board combined with multiple wireless devices.

The problem was solved by directly supplying power to the VCC of LDO for VCC_AON_1P8, which is role of U27 in the Quark c1000 development platform fab C.

I don't know why, but it seems that internal power sources fell cascade since VSYS.

Anyway, thank you very much Michelle.

- Jeong

View solution in original post

8 Replies
Michelle_C_Intel
Employee
190 Views

Hi Jeong,

I think the issue is unlikely to be related to the QMSI 1.4 ROM. Can you still connect to the SoC using OpenOCD ?

Have you taken the power sequencing considerations outlined in this document into account ? - https://www.intel.com/content/dam/www/public/us/en/documents/application-notes/quark-c1000-power-seq... https://www.intel.com/content/dam/www/public/us/en/documents/application-notes/quark-c1000-power-seq...

Check the OPM2P6_VOUT - the recommendation is to ensure that OPM2P6_VOUT node is discharged to ground(zero volts) before a power up cycle

- Michelle.

JHasa
Novice
190 Views

Thanks for quick answer Michelle

After update ROM i cannot launch by OpenOCD.

And this is voltage of VCC_AVD_OPM_2P6 on my board when boot sequence.

I designed VCC_AVD_OPM_2P6 just like C1000 development platform fab C. Connect VCC_AVD_OPM_2P6 to VCCOUT_AVD_OPM_2P6 and connect it to ground with a 100nF, 4.7uF capacitor.

On my board, 3.7V LDO(connected with VCC_BATT_X_3P7) make output 1V when disable. Could it be a problem? I think that is floating state.

- Jeong

Michelle_C_Intel
Employee
190 Views

What error are you getting when you try to connect the OpenOCD ?

JHasa
Novice
190 Views

+

When boot sequence, COMP_AREF maintain 3.3V for a few seconds, then falls to 0V.

You can see it in the waveform below.(CMOP_AREF reduced by 1.8V LDO) VCCOUT_ESRx also maintain own voltage for a few seconds, then falls to 0V.

I think C1000's power is turned off, despite 3.7V vcc is supplied.

I can not guess the cause of this result at all ;(

-Jeong

JHasa
Novice
190 Views

Hi Michelle.

I used openOCD binary and cfg files included in ISSM_2016.2.094.

quark_se_onboard.cfg log :

C:\IntelSWTools\ISSM_2016.2.094\tools\debugger\openocd>bin\openocd.exe -f script

s\board\quark_se_onboard.cfg

Open On-Chip Debugger 0.8.0-dev-g377d3f24-dirty (2017-04-11-19:24)

Licensed under GNU GPL v2

For bug reports, read

http://openocd.sourceforge.net/doc/doxygen/bugs.html

Info : only one transport option; autoselect 'jtag'

adapter speed: 1000 kHz

trst_only separate trst_push_pull

jtag_ntrst_delay: 300

Info : clock speed 1000 kHz

Info : JTAG tap: quark_se.cltap tap/device found: 0x0e765013 (mfg: 0x009, part:

0xe765, ver: 0x0)

Enabling arc core tap

Info : JTAG tap: quark_se.arc-em enabled

Enabling quark core tap

Info : JTAG tap: quark_se.quark enabled

Processor type: arc-em

-- It stops here forever.

quark_se.cfg log :

C:\IntelSWTools\ISSM_2016.2.094\tools\debugger\openocd>bin\openocd.exe -f script

s\board\quark_se.cfg

Open On-Chip Debugger 0.8.0-dev-g377d3f24-dirty (2017-04-11-19:24)

Licensed under GNU GPL v2

For bug reports, read

http://openocd.sourceforge.net/doc/doxygen/bugs.html

Runtime Error: C:/IntelSWTools/ISSM_2016.2.094/tools/debugger/openocd//scripts/t

arget/quark_se.cfg:2: invalid command name "jtag"

in procedure 'script'

at file "embedded:startup.tcl", line 58

at file "scripts\board\quark_se.cfg", line 3

at file "C:/IntelSWTools/ISSM_2016.2.094/tools/debugger/openocd//scripts/target/

quark_se.cfg", line 2

Thanks,

- Jeong

Michelle_C_Intel
Employee
190 Views

Hi Jeong,

Ok - so using the quark_se_onboard.cfg you have a good OpenOCD connection. While that is running open a telnet session to localhost Port 4444.

Try to reset the SoC using 'reset halt' command.

If the SoC refuses to halt then that will confirm the issues we have seen here previously ... If it happens can you check the voltage level on the HOST_1P8 rail

The issue you are seeing above with the Voltage dropping to 0 is most likely related to the PWR_GOOD signal .

-Michelle.

JHasa
Novice
190 Views

Thanks again Michelle.

I have tested 'reset halt' command in telnet session. Results are as follows.

So I checked HOST_1P8. Initially, 1.8V is output and falls to 0V after a few seconds with others. The waveform is the same as the previous post.

-Jeong

JHasa
Novice
191 Views

Finally solved! I got C1000 board combined with multiple wireless devices.

The problem was solved by directly supplying power to the VCC of LDO for VCC_AON_1P8, which is role of U27 in the Quark c1000 development platform fab C.

I don't know why, but it seems that internal power sources fell cascade since VSYS.

Anyway, thank you very much Michelle.

- Jeong

View solution in original post

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