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FGold
New Contributor II
1,101 Views

The Following GPIO Outputs cannot be controlled!!

This issue was raised at the end of last year, and is still an issue!

Dec 30, 2016 4:02 PM (/message/443366# 443366 in response to Floyd Goldstein)

This message was posted by Intel Corporation on behalf of HannaJen

Hi Floydg,

 

 

Let me investigate a little bit more regarding your question. Thanks for your patience during the meantime.

 

 

Regards,

 

-Yermi

Yermi,

Testing Results:

root@intel-corei7-64:~# uname -a

Linux intel-corei7-64 4.4.36-yocto-standard # 1 SMP PREEMPT Fri Dec 16 16:15:48 U

TC 2016 x86_64 GNU/Linux

mraav1.5.1-24-g2ea6810 on Intel GT Tuchuck

mraa-gpio set [pin] [0/1]

BadPins: 7 - Could not initialize gpio 7, 63, 67, 69, 71 went low (cannot set high), 72, 73 went low (cannot set high), 74,75 went low (cannot set high), 76, 77, 78 went low (cannot set high), 79, 80
0 Kudos
8 Replies
idata
Community Manager
30 Views

Hi Floydg,

 

 

Thanks for contacting us!

 

 

We would like to let you know that this issue has been reported before and our team is still working on it. We have tested all the GPIO pins you have reported using the last MRAA version (Version: v1.5.1-24-g2ea6810, the same you are using) and we have gotten the same behavior.

 

 

We will report it to our development team again, and we will update you as soon as we have useful information.

 

 

Thanks for reporting it.

 

 

Regards,

 

-Yermi A.

 

FGold
New Contributor II
30 Views

What are the firmware/software engineers designing to for a requirement specification, and or what does the hardware support and dictate?

I have been relying on the mraa-gpio list, and mraa: Intel Joule pin assignments.

The documentation is not in sync:

mraa-gpio list and state "one set of pin assignment" https://iotdk.intel.com/docs/master/mraa/grossetete.html mraa: Intel Joule

and http://www.intel.com/content/www/us/en/support/boards-and-kits/intel-joule-kits/000022494.html Intel® Joule™ Expansion Board Breakout Definition for Linux* states a different set of pin assignments:

idata
Community Manager
30 Views

Hi Floydg,

 

 

We would like to know if all affected signals contain valid pull-up resistors post level-shifting. In the http://www.intel.com/content/dam/support/us/en/documents/joule-products/intel-joule-dev-kit-hardware... Hardware guide section 10.1.1 you can find an example to add the pull-up resistors.

 

 

We'll be waiting for your reply.

 

 

Regards,

 

-Yermi A.

 

FGold
New Contributor II
30 Views

The pins identified have been tested at using a logic analyzer with a threshold at 1.8v on the Intel Tuchuck board, therefore no pullup resistors are needed to verify GPIO control.

The pins listed above have issues with Control GPIO.

On the PCB we are working with today, we have integrated 3.3v pullups, as noted in section 10.1.1 of the Hardware Guide.

Just to re-iterate:

GPIO Pins that cannot be controlled as Outputs:Pin 7 - Error message "Could not initialize gpio 7", 63, 67, 69, 71 went low (cannot set high), 72, 73 went low (cannot set high), 74,75 went low (cannot set high), 76, 77, 78 went low (cannot set high), 79, 80

A total of 14 Pins

Yermi,

Please verify these GPIOs and respond with your test results, or provide previous test results from Intel regarding these GPIOs. Thanks in advance.

 

FGold
New Contributor II
30 Views

Yermi,

any status? waiting for your response. Thanks in advance.

idata
Community Manager
30 Views

Hi Floydg,

 

 

I have tested those GPIO pins and I have gotten the same results, however, I would like to let you know that our engineering team is still working on it, and as soon as I have an update I'll let you know. Thanks for your patience.

 

 

Regards,

 

-Yermi A.

 

idata
Community Manager
30 Views

Hi Floydg,

 

 

We would like to update this case and let you know that we are aware of the discrepancies on the mraa webpage (https://iotdk.intel.com/docs/master/mraa/grossetete.html https://iotdk.intel.com/docs/master/mraa/grossetete.html) and we are currently working on a solution. We will post back as soon as we have an update.

 

 

Regards,

 

-Yermi A.

 

idata
Community Manager
30 Views

Hi Floydg,

 

 

Thanks for your patience. We would like to let you know that we have completed updating the article with the proper Linux GPIO pin mapping at: http://www.intel.com/content/www/us/en/support/boards-and-kits/intel-joule-kits/000022494.html Intel® Joule™ Expansion Board Breakout Definition for Linux*, please be aware that mraa page has not been updated as of this post, so, we'd recommend you to report the discrepancies on the mraa webpage in the issues tab to put them aware of the discrepancies.

 

 

Regards,

 

-Yermi A.

 

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