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Community Manager
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Use SPI CS0

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Hi,

for my custom board I want to use both CS Pins.

Are there updates on this problem (CS0 Problem )? When will it be fixed?

Flo1991


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Employee
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Hi Flo1991,

The problem you describe is not a problem actually; it's simply the way the Edison image works. According to the thread you pointed, the CS0 can't be used from userspace because it is used for the ADC available on the Arduino Breakout Board. The Edison image was built for that purpose so the CS0 is reserved for the ADC.

Even though you are using a custom board, the Edison image hasn't changed so the CS0 line remains reserved. Anyhow, the CS line is only used to enable/disable the SPI Slave device, it's not part of the SPI transfer itself so you could use any GPIO to work as the CS line. You could use the CS0 pin as a GPIO and toggle it manually from your script setting it LOW before the SPI transfer starts and then setting it HIGH after the SPI transfer finishes.

Regards,

Diego

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Employee
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Hi Flo1991,

The problem you describe is not a problem actually; it's simply the way the Edison image works. According to the thread you pointed, the CS0 can't be used from userspace because it is used for the ADC available on the Arduino Breakout Board. The Edison image was built for that purpose so the CS0 is reserved for the ADC.

Even though you are using a custom board, the Edison image hasn't changed so the CS0 line remains reserved. Anyhow, the CS line is only used to enable/disable the SPI Slave device, it's not part of the SPI transfer itself so you could use any GPIO to work as the CS line. You could use the CS0 pin as a GPIO and toggle it manually from your script setting it LOW before the SPI transfer starts and then setting it HIGH after the SPI transfer finishes.

Regards,

Diego

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Community Manager
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Thank you for your answer, but is it possible to change the image so that CS0 is not reserved? How can I do it?

Yes it is possible to toggle the GPIO, but I would prefer a hardware CS :-)

If the state of CS0 cannot be changed, is it possible to change the behaviour of the SPI Bus using CS0,

so I could use it for a different ADC or anything else?

Flo1991

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Hi Flo1991,

Let me check if I can find information about the CS0. I'll post any information that I find as soon as possible.

Regards,

Diego

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I have successfully getting works both spidev5.0 and spidev5.1. Hope this patch helps you.

https://gist.github.com/FantomJAC/69c3e963580e939b0615 Enable SPI CS0 (spidev5.0) on Intel Edison · GitHub

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Employee
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Hi Flo1991,

In order to use the CS0 you would have to build a custom image with the proper changes. Removing the Arduino layer may free the CS0 from being reserved. Anyhow, there is plenty of material online available on how to configure and build custom images; however it might take some time to learn in case you're not familiar with it.

On the other hand, the patch shared by Fantom_JAC seems to be very helpful. I recommend you to check it.

Regards,

Diego

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Community Manager
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Hi,

thank you for your provided solutions. I will try them in the next weeks.

I already built a custom image for using a lan9512 and it is working, so it should be no problem.

I will post the results if I had success or futher problems.

Flo1991

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Hi Fantom_JAC,

Would you mind to show me how to incorporate your patch into kernel build?

Thanks,

Ye-Sheng

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Hi DiegoV,

If I program CS0 line as GPIO, will CS1 still be toggled when I use the mraa SPI library to read or write? if yes, can I further program CS1 as GPIO as well to fix this problem?

Thanks

lyfkyle

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Hi lyfkyle,

If I'm not mistaken, when you set up the SPI interface, the CS1 is set up automatically, regardless of the CS0. The CS0 is reserved for the ADC available on the Arduino Breakout Board. As it's mentioned above, to make changes to the CS0 functionality, you would have to build a custom image with the proper changes.

Anyhow, the CS lines in the SPI interface are intended to "select" the slave device you will transfer data to. You could do this with any other pin configured as GPIO, and then set it manually to HIGH or LOW in order to de-select or select the slave device.

Regards,

Diego

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New Contributor I
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Hi Deigo:

Thank you for your reply. I still some doubts that I hope you can help me clarify.

In your answer that is marked correct, you mention that one can use CS0 as GPIO, do I have to modify image to achieve that?

Also, is it true that even if I manually toggle a GPIO to select a slave, CS1 will also be toggled when I use mraa SPI library to transfer data, leading to 2 slaves being selected at the same time?

I am using a custom board by the way which has multiple SPI devices. CS lines are connected to several GPIOs including both CS0 and CS1. I am trying to avoid modifying image but based on the current information I found, it seems to be the only option.

Regards

lyfkyle

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Hi lyfkyle,

Most of the Edison's IO have different functionalities, for example SPI, I2C or UART, but they can be programmed to work as GPIO as well. This means that you could use the CS0 pin as a GPIO.

For the second question, I haven't tested it, but I'd say yes, the CS1 will also be toggled because it's the one used by the MRAA library. You could use another GPIO pin instead of the CS1 pin to avoid having two slave devices selected at the same time, but I don't know if you can do this change in your custom board. Anyhow, as I said, I haven't tested it. I recommend you to test this, so you can be sure how everything works when having multiple CS lines.

Regards,

Diego

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New Contributor III
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Here I describe how to use SPI CS0 for my display: http://hobby.farit.ru/framebuffer-fbtft-installation-intel-edison-oled-display-ssd1322/ Framebuffer fbtft Installation on Intel Edison for OLED Display SSD1322 | Hobby

You can prevent the driver for ads7955 from loading by commenting the line with it in board.c

I created a patch for it.

From c83f14b37bc2dcfa97b36214f02b15ddaad51a47 Mon Sep 17 00:00:00 2001

From: Farit <</span>mailto:farit@example.com farit@example.com>

Date: Sat, 9 Apr 2016 22:02:19 -0700

Subject: [PATCH] platform_ssd1322

---

arch/x86/platform/intel-mid/board.c | 2 +-

1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/platform/intel-mid/board.c b/arch/x86/platform/intel-mid/board.c

index eb3d8a4..fca6440 100644

--- a/arch/x86/platform/intel-mid/board.c

+++ b/arch/x86/platform/intel-mid/board.c

@@ -111,7 +111,7 @@ struct devs_id __initconst device_ids[] = {

/* SPI devices */

{"spidev", SFI_DEV_TYPE_SPI, 0, &spidev_platform_data, NULL},

- {"ads7955", SFI_DEV_TYPE_SPI, 0, &ads7955_platform_data, NULL},

+// {"ads7955", SFI_DEV_TYPE_SPI, 0, &ads7955_platform_data, NULL},

{"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data, NULL},

{"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data, NULL},

{"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data,

--

1.9.1

You can load it at the compilation time by adding the path to the patch file in the file "~/edison/edison-src/meta-intel-edison/meta-intel-edison-bsp/recipes-kernel/linux/linux-yocto_3.10.bbappend".

SRC_URI += "file://defconfig"

SRC_URI += "file://upstream_to_edison.patch"

SRC_URI += "file://platform_ssd1322.patch"