So i would like to confirm a certain aspect on the thunderbolt for the Nuc 9 , as NUC9i7QNX and so on the Nuc11 beast and nuc12 extrm. On manual and spec it show it can support up to 2 display , as having 2 usb-c port. But on all 3 nuc card, based on the diagram, it's only driven by 1 lane feeding 2 controller. Just like many egpu like razer corev2 having 2 controller inside, but getting data from 1 tb port feed.
By that :
if we put 2 egpu or 2 TB network nic card running both at high speed will it result as having a total tb3-4 of about 22gbps usable for both? So only 11gbps will be the real availability to each of the unit ? Because the bottleneck of the pcix4 lane...
Thanks for precision
First of all, a separate DP 1.4 channel is provided to each TBT4 Port.
It is true, however, that the PCIe x4 bandwidth of the TBT4 controller is shared by the two TBT4 ports (insofar as non-DP-graphics usage is concerned). It is also true that this can be further limited by the bandwidth of the DMI bus connecting the CPU to the PCH (chipset), which is shared by all downstream capabilities of the PCH (PCIe, USB, SATA, CNVi, SPI, LPC, etc.).
In the 12th gen NUCs, the PCIe 4.0 x4 bandwidth is 16 GT/s or ~64 Gb/s. This means that ~32 Gb/s can be utilized by each TBT4 port for the support of external, non-monitor devices.
BTW, AFAIK, there are no 2TB NIC cards in existence. Best card I have seen gives 10Gb x4 NICs and that is only possible in PCIe connection.
Indeed interesting for the Nuc12 as the pci4 will sure give extra bw to both. On the unit itself, pleny of unit, let say Sonnet twin, Netstor or akitio that you fit 10g nic inside. Best are complete unit as Atto with even dual 25g port.
So here, let took 2x tb3 ethernet unit with 1 or dual port 10g. Running both iperfs or transfer file on 2 or 4 different sub : will this mean a limited bandwidth of max 11gb to each of TB port , on a nuc 9 and nuc11 ? or way lower ...
Well, in the 8th gen, each PCIe 3.0 lane was 8GT/s (~1GB/s, ~8Gb/s) so the x4 is 32GT/s (~32Gb/s), the DMI 3.0 Bus is 32GT/s (equivalent to 4x PCIe 3.0 lanes, though Intel hates me saying that way) and each TBT 3.0 port (still) supports up to 40Gb/s (up to ~32Gb/s for GPIO). However it ends up divvied up, the two TBT ports have the ~32Gb/s to share for GPIO. Of course, the bandwidth available can be disaffected by the needs of the other interfaces in the PCH.
Thanks for precision, that's way more clear. And just to confirm on the overhead.. is the <reserve> 10g usb lane is part of it or eat the 32gb ? like using port 1 connect to an egpu pci card at full speed and port 2 of the nuc used as a tb network function giving 10g.
Everything - GPIO, USB and DisplayPort - is part of the 40Gb/s capability. Only DisplayPort does not affect the ~32Gb/s PCIe bandwidth capability of the Thunderbolt controller. Remember that, using a dual-Port Thunderbolt controller IC, this ~32Gb/s bandwidth is shared by the two Thunderbolt ports.