[Whitley][ICX] why there is a register set for only one channel?

[BoyceHong]

Hi everybody,

As shown in ICX EDS Vol2 chapter 13, there are registers for IMC level and no channel level, but SKX/CLX have channel level regisets.

For example, ICX has 4 IMC and 2 channel per IMC. We can detect the channel0 dimm0 population by DIMMMTR_0(2080Ch), but how do i detect the channel1 dimm0 population? There is only one DIMMTR_0 per IMC.

Thanks!

[AlHill]

I am absolutely certain you have the wrong forum.

Doc