Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

3 wire spi data transfer

Altera_Forum
Honored Contributor II
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Hi  

 

I am using 3 wire SPI IP from the prime Software. I didn't found any document which says how to pass the data or how to use this IP.  

 

In this IP, 

Input side 3 wire SPI IP, which is Avalon memory mapped interface, consisting of data lines, clock, write, read, chipselect signals. 

Output side 3 wire SPI IP, having SPI interface, consisting of MISO, MOSI, SS_N, SCLK. 

 

I am using 5 slave to connect and communicate with 3 WIRE SPI. 

 

CAN ANYONE HERE PLEASE TELL ME HOW TO PASS THE DATA OVER 3 WIRE SPI????
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Altera_Forum
Honored Contributor II
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Chapter 5 of the "embedded peripherals ip user guide (https://www.altera.com/en_us/pdfs/literature/ug/ug_embedded_ip.pdf)" covers Altera's SPI IP core. See table 21 for the register map which you access via the Avalon MM interface. 

 

Cheers, 

Alex
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