ALTLVDS in SOPC

Altera_Forum · ‎03-09-2010

Hi,

I am using Quartus II 8.0 for programming a Cyclone III device. I have a 2 LVS clocks (fclk and lclk) and a channel (12 bit) LVDS input that I wish to deserialize. I use 2 channels and factor 6.

In SOPC I create a ALTLVDS component ...

In SOPC: Tools -> IP MegaStore...

/ Create a new custom megafunction variation

/ Cyclone III device,VHDL, ALTLVDS:

LVDS_RECEIVER, 2 channels;

deserialization factor = 6;

use external PLL = ON;

enable bitslip control = OFF;

generate netlist = OFF;

and the all options from last page = ON; and finish

Later, in SOPC:

Create new component ->

in hdl menu, I load only the .vhdl file created

in signals menu:

rx_inclock = interface clock_sink (Clock Input);

signal type = clk;

rx_in = interface avalon_slave0;

signal type = writebyteenable;

rx_out = interface avalon_slave0;

signal type = readdata;

in interfaces menu:

All default and associated clock = clock_sink

and finish...

My problem is: I add the ALTLVDS component in my SOPC project, but nothing happens in the main project in quartus ( after to compile ), in pin planner any pin from ALTLVDS componet appears (rx_in, rx_out...) and when I try to write some thing about the component in the main file (myproject.v) , the quartus doesn't recognize it...

Please, help me....

Altera_Forum · ‎12-14-2010

up

somebody can help me ?