Altera will remove schematic from future versions of Quartus?

[Altera_Forum]

Hi all! 

 Is it true that Altera plans to remove schematic from future versions of Quartus?  I'm looking at new Quartus 14th version and find that schematic doesn't create by default from IP.  I frequently use schematic, often as a top-level, for example when I want to explain project and it's goal as a whole.  Xilinx has already removed schematic but in my opinion this ability is significant.

[Altera_Forum]

They won't remove it entirely because of so many legacy designs. But because it is hardly used by anyone that brings them much income it wont be high up on their priority list to keep up dated

[Altera_Forum]

You would think that with Xilinx Vivado IP integrator looking like a schematic Altera would want to improve the schematic editor to keep up.

[Altera_Forum]

Thanks for your answer, Tricky! 

  Thank you, Galfonz! I know about Vivado IP Integrator, but it is a high-level schematic,  like QSYS schematic. Xilinx removed schematic from it's software, you can only observe RTL from HDL code and can't  instantiate, for example, PLL at the top level as a schematic.

[Altera_Forum]

--- Quote Start ---  You would think that with Xilinx Vivado IP integrator looking like a schematic Altera would want to improve the schematic editor to keep up.  --- Quote End ---   Unlikely. Altera has QSYS for similar purposes.

[Altera_Forum]

I always use schematics in my designs. I'm able to make them hierarchical and modular thus making it easier for someone new to the design to figure how things are connected. I'm always looking how I can make things less complex and I feel schematics help me achieve that goal.

[Altera_Forum]

--- Quote Start ---  I always use schematics in my designs. I'm able to make them hierarchical and modular thus making it easier for someone new to the design to figure how things are connected. I'm always looking how I can make things less complex and I feel schematics help me achieve that goal.  --- Quote End ---    This is fine for small designs perhaps. But the ease of viewing is hampered by several factors: 1. Cannot be simulated directly 2. Doesnt fit in version control nicely 3. Cannot be ported to xilinx directly.  The usual way to show someone a design would be the architectural documentation.

[Altera_Forum]

It's not perfect and can be self-documenting.