I have been successful making .jbc files for a Max 5 CPLD using Quartus 13.1. I now need to do a similar thing for a Max 10 FPGA. I've heard issues regarding Quartus 17+ and generating .jbc files. Are there known issues with Quartus 18? Would I be better off using an earlier version until any known issues are resolved?
This is a project non-starter if I cannot generate .jbc files.
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
(This message was posted on behalf of Intel Corporation)
I'm afraid I do not understand the response. I am not intending to encrypt anything. I am simply trying to generate .JBC files as I have done successfully with versions of Quartus (Lite Edition) prior to 18.0. WHile I can (apparently) generate the .JBC file itself, it fails to program 100% of the time. If I use Quartus 15.1 (again, Lite Edition) to create the .JBC file, it works fine. I have seen one other post in which a similar observation was made. That author of that post indicated an apparent issue related to some internal "algorithm version 68" which is new after Quartus 17.
I have not worked on this issue for about three months. Back then I was under pressure to prove that our design was viable (i.e. that the hardware could support in-system programming using the JAM player). While I mananged to prove that, I must now get the design polished to the point of reliable operation. This includes the firmware revision and re-programming process in the field.
So, is Intel aware of any issues regarding the ability of Quartus 18.0 (Lite Edition) and later to generate reliable .JBC files?
I will continue to use my workaround (i.e. use Quartus 15) to create .JBC files. However, such a workaround makes me uncomfortable, especially with the newer MAX 10 device family.
Actually,sometimes it is difficult to identity exact issue with only one post & that made me to support my previous post.
Now I request you,please provide below information,
I used MAX 10 development kit & Quartus 18.1 Lite edition to check .jbc programming using Embedded Intel FPGA Download Cable II (JTAG) & I could able to program the .jbc & _pof.jbc files generated using below link,
Refer the attachment & screenshot & let me know if you have any different concern.
It has been some time since I last discussed the issues I've been having with .jbc file creation/use. However, I have finally had the time to better document/explain the scenario I am encountering. I summarize it as follows:
There seem to be two issues, and they may be related:
Can you offer any help to this ongoing issue? I sincerely appreciate any attention you or your team can devote to helping me solve this. I am eager to design this very capable device into future designs (and its already been designed into 3 of our products). However, this problem is discouraging me from doing so any further.
To help explain the above in a different way, I've created a diagram of the .jbc file creation process I have followed. Please have a look at the attached .PDF entitled "JBC_issues_flow_diagram.pdf". I hope that it will clarify the issue at hand.
Many thanks in advance for your time/effort.
I apologize. The previous .PDF contains an error.
I have corrected the error and attached a new version entitled "JBC_issues_flow_diagram_v2.pdf".
The error pertains to the dialog boxes that appear on the right side of the diagram. These dialog boxes show the sequence of JAM Player messages that were received when the programming of that particular file failed. The sequences are clearly different betwen Q18.0 and Q15.1.
The error in the first .PDF I sent had these two dialog boxes swapped.
Please let me know if I can clarify any further.
The issue at my end is, almost all machines are with windows 10 & Jam STAPL Byte-Code Player Version 2.2 tool supports only on
Windows NT 4.0, Windows 98, Windows 95 so I am unable to replicate issue.
if you are using JAM player installed on other than above mentioned operating system or any custom application, In that case it might get encountered an issue.
If you observed my previous post, where I was able to configure MAX10 development kit with the .jbc file using Intel download cable II(USB blaster II) in Quartus 18.1 lite tool.