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Hello,
I look for a design methodology PCB or an example for the placement of decoupling capacitors -> Arria II GX Thanks.Link Copied
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This page should be your new best friend:
http://www.altera.com/products/devices/arria-fpgas/arria-ii-gx/literature/aiigx-literature.jsp For determining the number of decoupling caps and their sizes, use the PDN tool for Arria II GX (accessible through the page I listed above): http://www.altera.com/literature/ug/pdn_tool_aiigx.zip Design Guidelines: http://www.altera.com/literature/an/an563.pdf Pin Connection Guidelines: http://www.altera.com/literature/dp/arria-ii-gx/pcg-01007.pdf Some general info on supply decoupling: http://www.altera.com/support/devices/power/integrity/pow-integrity.html http://www.altera.com/literature/an/an574.pdf Jake
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