I´m working with quartus pro 19.4 and Arria10 SX. I have a pll(IOPLL3B) + tx serdes with lvds outputs in banks 3A and 3B. The fitter can´t place my assignment. Nevertheless, if I change the PLL to IOPLL3A (changing the clk pinout), the fitter finish ok with the same lvds pinout.
Regarding the Arria10 handbook, It´s supposed that the IOPLL can feed tx serdes in adjacent banks. Why from IOPLL3A works to banks 3A and 3B and from IOPLL3B doesn´t work?
The compilation was ok with the quartus 16.0 version, now we changed to quartus 19.4 and it doesn´t work. We already have our board with this pinout, changing the pinout is very expensive for us, for we need a new PCB.
