Assigning LVDS (differential) pins

[Altera_Forum]

I am using a Cyclone III device with LVDS inputs and outputs in bank 2 and 5. 

 My usual design capture method is to use a *.bdf block diagram/schematic file for the top level. Here I show all of the assigned input and output pins. I go to the pin assignment tool to assign the pins.  ?What is the proper procedure for assigning pins to differential I/O?  I have taken a couple different approaches  1. using alt_outbuf_diff symbols 2. inserting a single output symbol for which the fitter assigns the complement pin itself. 3. assigning both the signal and signal(n) pins in the assignment editor.  What is the proper way to assign differential pins?

[Altera_Forum]

I believe you have it right. Select appropriate pins in the pin planner that can be differential. Then set the I/O standard and state they are differential in the assignment editor. I'm not sure that you need to use alt_outbuf_diff.

[Altera_Forum]

The simple method 2 is sufficient.

[Altera_Forum]

Sorry to resurrect an old thread, but I have a variation on this question: what is the best way to swap the positive/negative hookups for a few select pins? 

 For board routing reasons, a few signal pairs in interconnect buses are swapped in the connections between my FPGAs. I'm currently using positive-only signals and letting Quartus figure out the complement (method# 2 above). However, if I try assigning one of my positive signals to a negative pin, Quartus gives me an error: "Error: Can't place differential I/O positive pin at a differential I/O negative location."  Is there a way to suppress this error and tell it I know what I'm doing, and have it go ahead and connect the complement to the positive pin? Or do I need to instantiate alt_outbuf_diffs? The latter would be tedious, since these complement pins are isolated bits in the middle of buses.  If I manually negate the signal, will Quartus be clever enough to swap the differential pair?  -Brett

[Altera_Forum]

Positive and negative pins of a differential pair are dedicated and can't be swapped. You have to invert the logic signal if necessary.

[Altera_Forum]

OK, I guess that makes sense. Thanks for the reply. 

 -Brett

[Altera_Forum]

--- Quote Start ---  I am using a Cyclone III device with LVDS inputs and outputs in bank 2 and 5.  My usual design capture method is to use a *.bdf block diagram/schematic file for the top level. Here I show all of the assigned input and output pins. I go to the pin assignment tool to assign the pins.  ?What is the proper procedure for assigning pins to differential I/O?  I have taken a couple different approaches  1. using alt_outbuf_diff symbols 2. inserting a single output symbol for which the fitter assigns the complement pin itself. 3. assigning both the signal and signal(n) pins in the assignment editor.  What is the proper way to assign differential pins?  --- Quote End ---    Hey, I am more focus with the Cyclone III device. Do you have any pics of it? Your usual design is just like what I heard from my cousin.