- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
HELLO,
Its PLEASURE this kind of medium TO FOR DISCUSSION OF PROBLEM REGARDING VERILOG CODE. I am beginner of the Verilog and i am learning verilog, how to call module write testbench..etc I REQUIRE verilog CODE THAT CAN TEST ALU USING BIST(built-in self test) METHOD (TEST PATTERN GENERATOR...> ALU......> RESPONSE ANALYZER). ALU OPERATION FOR 4 BIT ADDITION, SUBTRACTION, MULTIPLICATION.. etc pls help require code.Link Copied
3 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
We can help you with YOUR code, not write it for you. Post the code you are having a problem with.
Cheers, Alex- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- We can help you with YOUR code, not write it for you. Post the code you are having a problem with. Cheers, Alex --- Quote End --- thank you sir but i had made code which is only pattern generator and fault inserting accept the signature analyzing.... can you provide me code for signature analysis or guide me how i give output of cUT and that give to MISR(MULTI INPUT SIGNATURE REGISTER). and how MISR will give golden response so I can compare and find the response is good or not . so i can decide whether my alu is faulty or not .
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
As stated, I don't think folks are going to write code for you. Post what you have so we can take a look.
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page