Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Can't access all the address range of a memory mapped slave

ABrit6
Beginner
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I have a platform designer system with an Avalon MM Slave Translator, and I can't access the top 3/4 of the address range.

It's a 6 bit address width, accessing words, which platform designer tells me the address range is from 07000000 to 070000FF. probing some signals at test points, anything over 3F doesn't get the read or write bit set, and the address lines don't toggle at all (so if I increment the reads, it'll stay at 3C until it loops back around to 00)

If I set the address to 8 bits, it wants more address range, stomping over my other peripherals.

 

Addressing anything in the lower range works as expected.

 

Any insights or suggestions would be great.

 

Platform Designer 18.1 Build 625

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RichardTanSY_Intel
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Sorry for the delay in response. Can you help to share your design?

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