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Yes, Logic Lock is available. Exactly what steps are you performing that are not working?
This UG can address your question https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qps-design-optimizati..., 5.2.2. Creating Logic Lock (Standard) Regions.
Thanks for UG link.
For more complete information about compiler optimizations, see our Optimization Notice.