Can we use both HDL and opencl in one project on one chip FPGA?

[Altera_Forum]

As we known , HDL is more efficient than opencl ,but HDL needs more time than opencl for developping.Maybe we need use both HDL and opencl in one project on one chip FPGA .Both HDL and opencl are responsible for different functions,but I don't whether it is feasible . Can you give me some suggestions?

[Altera_Forum]

I am interested in the same topic and am currently trying to investigate this idea. Has anyone already investigated this idea and has some solutions?

[Altera_Forum]

--- Quote Start ---  As we known , HDL is more efficient than opencl ,but HDL needs more time than opencl for developping.  --- Quote End ---   This is not necessarily true; it largely depends on how the HDL code and the OpenCL code are written and optimized.  Anyway, mixing HDL with OpenCL is certainly possible, read "intel fpga sdk for opencl, section 2.1 - opencl library" (https://www.altera.com/en_us/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf).

[Altera_Forum]

Is there any demos about using both HDL and opencl in one project on one chip FPGA ?

[Altera_Forum]

Altera has an example for this; check this page (https://www.altera.com/products/design-software/embedded-software-developers/opencl/developer-zone.html) > Design Examples > OpenCL Library.

[Altera_Forum]

It's not only possible - but according to Altera's FAE it's the recommended approach for design entry. 

OpenCL isn't intended to replace HDL altogether.