Can you assign 'altera_reserved' JTAG pins to JTAG interface inside user logic?

[Daire_C_Intel]

I'm working off a max10 dev kit for now but will be soon scaling up for a larger design. All boards seem to have a JTAG dongle interface but you can't assign these pins to your own logic as they are reserved.

I've instantiated a 3rd party processor IP core which includes a JTAG interface for debug. I'd like to route this core's JTAG signals to the board's JTAG dongle header, for use with 3rd party debug software, but direct access using the pin planner isn't allowed. Is there a way around this?

[sstrell]

Does the Virtual JTAG IP fit your needs?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_virtualjtag.pdf

#iwork4intel

[anm]

I have been searching for a way to connect a custom JTAG module on the JTAG pins of my Altera board too, but I wasn't able to find one.

Instantiating an Altera Virtual JTAG module and connecting it to your debugger seems like a one way.

Also my intuition is that you will probably need to connect only the interface between the Altera Virtual JTAG and your Debugger.

The interfacing of the Altera Virtual JTAG with the JTAG pins of the board must be handled internally when you instantiate the module (at least that's what I can guess, because I don't have access to the JTAG pins of my Altera Board).

I hope that helps a bit.

Kind regards,

anm