Hi all,
I'm new on using Intel JESD204B IP Core and met some problems.
Since it's my first time trying to implementing the JESD204B IP-Core, I directly follow the
intel fpga jesd204b design example step-by-step. But I couldn't get the desired output files as the user guide instructs.
**Link of user guide:
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug-dex-a10-jesd204b.pdf According to page 4 of user guide, the output file structure should be something like attached pic_1.
When I click the "Generate Example Design" button with preset configuration in IP Parameter Editor Pro, multi errors occurred.
The message said 'Cannot run program "sys-script" (in driver\QII Installed_path\version\ip\a;tera\altera_jesd204b\src\top)'.
Looks like some parts missing in QuartusII tool chain, but I didn't modify anything after installation.
An of course, I've tried to re-install QuartusII Prime Pro (30-Days Trial) with version 16.1/17.0/17.1, none of these works normally as user guide described.
Did I miss any step or there's some other patch/tools I need to install?
Thanks in advance!
