- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi All,
What's the problem with the following code?
pmu# ()
i_pmu (// Outputs
.clk0 (clk_mn),
// Inputs
.rstn_ext (rstn_ext),
.clk_ext (clk_ext));
Cannot the parameters list be empty? I'm receiving the "Error (10170): Verilog HDL syntax error at amp_top.v(272) near text: ")"; expecting ".", or an operand". Why? Thank you!
Link Copied
1 Reply
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Quartus doesn't tolerate empty parameter lists, no.
Cheers, Alex
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page